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
  1. <!doctype html public "-//w3c//dtd html 4.0 transitional//en">
    2. 

  2. <html><head>
    3. 

  3. <title>Static Call Graph - [You Ren V1.0\You Ren V1.0]</title></head>
    4. 

  4. <body><HR>
    5. 

  5. <H1>Static Call Graph for image You Ren V1.0\You Ren V1.0</H1><HR>
    6. 

  6. <BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5050106: Last Updated: Fri Nov 14 15:25:10 2025
    7. 

  7. <BR><P>
    8. 

  8. <H3>Maximum Stack Usage =        568 bytes + Unknown(Cycles, Untraceable Function Pointers)</H3><H3>
    9. 

  9. Call chain for Maximum Stack Depth:</H3>
    10. 

  10. Task03 &rArr; Sbus_Can_Handle &rArr; Can_Drive_Send &rArr; can_send_msg &rArr; SEGGER_RTT_printf &rArr; SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    11. 

  11. <P>
    12. 

  12. <H3>
    13. 

  13. Mutually Recursive functions
    14. 

  14. </H3> <LI><a href="#[1d]">ADC_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1d]">ADC_IRQHandler</a><BR>
    15. 

  15. </UL>
    16. 

  16. <P>
    17. 

  17. <H3>
    18. 

  18. Function Pointers
    19. 

  19. </H3><UL>
    20. 

  20.  <LI><a href="#[1d]">ADC_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    21. 

  21.  <LI><a href="#[5]">BusFault_Handler</a> from stm32f4xx_it.o(i.BusFault_Handler) referenced from startup_stm32f407xx.o(RESET)
    22. 

  22.  <LI><a href="#[1f]">CAN1_RX0_IRQHandler</a> from stm32f4xx_it.o(i.CAN1_RX0_IRQHandler) referenced from startup_stm32f407xx.o(RESET)
    23. 

  23.  <LI><a href="#[20]">CAN1_RX1_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    24. 

  24.  <LI><a href="#[21]">CAN1_SCE_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    25. 

  25.  <LI><a href="#[1e]">CAN1_TX_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    26. 

  26.  <LI><a href="#[4b]">CAN2_RX0_IRQHandler</a> from stm32f4xx_it.o(i.CAN2_RX0_IRQHandler) referenced from startup_stm32f407xx.o(RESET)
    27. 

  27.  <LI><a href="#[4c]">CAN2_RX1_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    28. 

  28.  <LI><a href="#[4d]">CAN2_SCE_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    29. 

  29.  <LI><a href="#[4a]">CAN2_TX_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    30. 

  30.  <LI><a href="#[60]">Callback01</a> from freertos.o(i.Callback01) referenced from freertos.o(i.MX_FREERTOS_Init)
    31. 

  31.  <LI><a href="#[59]">DCMI_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    32. 

  32.  <LI><a href="#[16]">DMA1_Stream0_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    33. 

  33.  <LI><a href="#[17]">DMA1_Stream1_IRQHandler</a> from stm32f4xx_it.o(i.DMA1_Stream1_IRQHandler) referenced from startup_stm32f407xx.o(RESET)
    34. 

  34.  <LI><a href="#[18]">DMA1_Stream2_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    35. 

  35.  <LI><a href="#[19]">DMA1_Stream3_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    36. 

  36.  <LI><a href="#[1a]">DMA1_Stream4_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    37. 

  37.  <LI><a href="#[1b]">DMA1_Stream5_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    38. 

  38.  <LI><a href="#[1c]">DMA1_Stream6_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    39. 

  39.  <LI><a href="#[3a]">DMA1_Stream7_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    40. 

  40.  <LI><a href="#[43]">DMA2_Stream0_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    41. 

  41.  <LI><a href="#[44]">DMA2_Stream1_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    42. 

  42.  <LI><a href="#[45]">DMA2_Stream2_IRQHandler</a> from stm32f4xx_it.o(i.DMA2_Stream2_IRQHandler) referenced from startup_stm32f407xx.o(RESET)
    43. 

  43.  <LI><a href="#[46]">DMA2_Stream3_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    44. 

  44.  <LI><a href="#[47]">DMA2_Stream4_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    45. 

  45.  <LI><a href="#[4f]">DMA2_Stream5_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    46. 

  46.  <LI><a href="#[50]">DMA2_Stream6_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    47. 

  47.  <LI><a href="#[51]">DMA2_Stream7_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    48. 

  48.  <LI><a href="#[8]">DebugMon_Handler</a> from stm32f4xx_it.o(i.DebugMon_Handler) referenced from startup_stm32f407xx.o(RESET)
    49. 

  49.  <LI><a href="#[48]">ETH_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    50. 

  50.  <LI><a href="#[49]">ETH_WKUP_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    51. 

  51.  <LI><a href="#[11]">EXTI0_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    52. 

  52.  <LI><a href="#[33]">EXTI15_10_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    53. 

  53.  <LI><a href="#[12]">EXTI1_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    54. 

  54.  <LI><a href="#[13]">EXTI2_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    55. 

  55.  <LI><a href="#[14]">EXTI3_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    56. 

  56.  <LI><a href="#[15]">EXTI4_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    57. 

  57.  <LI><a href="#[22]">EXTI9_5_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    58. 

  58.  <LI><a href="#[f]">FLASH_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    59. 

  59.  <LI><a href="#[3b]">FMC_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    60. 

  60.  <LI><a href="#[5b]">FPU_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    61. 

  61.  <LI><a href="#[5a]">HASH_RNG_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    62. 

  62.  <LI><a href="#[3]">HardFault_Handler</a> from stm32f4xx_it.o(i.HardFault_Handler) referenced from startup_stm32f407xx.o(RESET)
    63. 

  63.  <LI><a href="#[2b]">I2C1_ER_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    64. 

  64.  <LI><a href="#[2a]">I2C1_EV_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    65. 

  65.  <LI><a href="#[2d]">I2C2_ER_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    66. 

  66.  <LI><a href="#[2c]">I2C2_EV_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    67. 

  67.  <LI><a href="#[54]">I2C3_ER_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    68. 

  68.  <LI><a href="#[53]">I2C3_EV_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    69. 

  69.  <LI><a href="#[4]">MemManage_Handler</a> from stm32f4xx_it.o(i.MemManage_Handler) referenced from startup_stm32f407xx.o(RESET)
    70. 

  70.  <LI><a href="#[2]">NMI_Handler</a> from stm32f4xx_it.o(i.NMI_Handler) referenced from startup_stm32f407xx.o(RESET)
    71. 

  71.  <LI><a href="#[4e]">OTG_FS_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    72. 

  72.  <LI><a href="#[35]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    73. 

  73.  <LI><a href="#[56]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    74. 

  74.  <LI><a href="#[55]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    75. 

  75.  <LI><a href="#[58]">OTG_HS_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    76. 

  76.  <LI><a href="#[57]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    77. 

  77.  <LI><a href="#[c]">PVD_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    78. 

  78.  <LI><a href="#[9]">PendSV_Handler</a> from port.o(.emb_text) referenced from startup_stm32f407xx.o(RESET)
    79. 

  79.  <LI><a href="#[10]">RCC_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    80. 

  80.  <LI><a href="#[34]">RTC_Alarm_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    81. 

  81.  <LI><a href="#[e]">RTC_WKUP_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    82. 

  82.  <LI><a href="#[1]">Reset_Handler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    83. 

  83.  <LI><a href="#[3c]">SDIO_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    84. 

  84.  <LI><a href="#[2e]">SPI1_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    85. 

  85.  <LI><a href="#[2f]">SPI2_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    86. 

  86.  <LI><a href="#[3e]">SPI3_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    87. 

  87.  <LI><a href="#[7]">SVC_Handler</a> from port.o(.emb_text) referenced from startup_stm32f407xx.o(RESET)
    88. 

  88.  <LI><a href="#[61]">StartDefaultTask</a> from freertos.o(i.StartDefaultTask) referenced from freertos.o(i.MX_FREERTOS_Init)
    89. 

  89.  <LI><a href="#[a]">SysTick_Handler</a> from cmsis_os2.o(i.SysTick_Handler) referenced from startup_stm32f407xx.o(RESET)
    90. 

  90.  <LI><a href="#[5d]">SystemInit</a> from system_stm32f4xx.o(i.SystemInit) referenced from startup_stm32f407xx.o(.text)
    91. 

  91.  <LI><a href="#[d]">TAMP_STAMP_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    92. 

  92.  <LI><a href="#[23]">TIM1_BRK_TIM9_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    93. 

  93.  <LI><a href="#[26]">TIM1_CC_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    94. 

  94.  <LI><a href="#[25]">TIM1_TRG_COM_TIM11_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    95. 

  95.  <LI><a href="#[24]">TIM1_UP_TIM10_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    96. 

  96.  <LI><a href="#[27]">TIM2_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    97. 

  97.  <LI><a href="#[28]">TIM3_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    98. 

  98.  <LI><a href="#[29]">TIM4_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    99. 

  99.  <LI><a href="#[3d]">TIM5_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    100. 

  100.  <LI><a href="#[41]">TIM6_DAC_IRQHandler</a> from stm32f4xx_it.o(i.TIM6_DAC_IRQHandler) referenced from startup_stm32f407xx.o(RESET)
    101. 

  101.  <LI><a href="#[42]">TIM7_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    102. 

  102.  <LI><a href="#[36]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    103. 

  103.  <LI><a href="#[39]">TIM8_CC_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    104. 

  104.  <LI><a href="#[38]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    105. 

  105.  <LI><a href="#[37]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    106. 

  106.  <LI><a href="#[62]">Task02</a> from freertos.o(i.Task02) referenced from freertos.o(i.MX_FREERTOS_Init)
    107. 

  107.  <LI><a href="#[63]">Task03</a> from freertos.o(i.Task03) referenced from freertos.o(i.MX_FREERTOS_Init)
    108. 

  108.  <LI><a href="#[67]">TimerCallback</a> from cmsis_os2.o(i.TimerCallback) referenced from cmsis_os2.o(i.osTimerNew)
    109. 

  109.  <LI><a href="#[3f]">UART4_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    110. 

  110.  <LI><a href="#[40]">UART5_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    111. 

  111.  <LI><a href="#[5f]">UART_DMAAbortOnError</a> from stm32f4xx_hal_uart.o(i.UART_DMAAbortOnError) referenced from stm32f4xx_hal_uart.o(i.HAL_UART_IRQHandler)
    112. 

  112.  <LI><a href="#[66]">UART_DMAError</a> from stm32f4xx_hal_uart.o(i.UART_DMAError) referenced from stm32f4xx_hal_uart.o(i.UART_Start_Receive_DMA)
    113. 

  113.  <LI><a href="#[64]">UART_DMAReceiveCplt</a> from stm32f4xx_hal_uart.o(i.UART_DMAReceiveCplt) referenced from stm32f4xx_hal_uart.o(i.UART_Start_Receive_DMA)
    114. 

  114.  <LI><a href="#[65]">UART_DMARxHalfCplt</a> from stm32f4xx_hal_uart.o(i.UART_DMARxHalfCplt) referenced from stm32f4xx_hal_uart.o(i.UART_Start_Receive_DMA)
    115. 

  115.  <LI><a href="#[30]">USART1_IRQHandler</a> from stm32f4xx_it.o(i.USART1_IRQHandler) referenced from startup_stm32f407xx.o(RESET)
    116. 

  116.  <LI><a href="#[31]">USART2_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    117. 

  117.  <LI><a href="#[32]">USART3_IRQHandler</a> from stm32f4xx_it.o(i.USART3_IRQHandler) referenced from startup_stm32f407xx.o(RESET)
    118. 

  118.  <LI><a href="#[52]">USART6_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    119. 

  119.  <LI><a href="#[6]">UsageFault_Handler</a> from stm32f4xx_it.o(i.UsageFault_Handler) referenced from startup_stm32f407xx.o(RESET)
    120. 

  120.  <LI><a href="#[b]">WWDG_IRQHandler</a> from startup_stm32f407xx.o(.text) referenced from startup_stm32f407xx.o(RESET)
    121. 

  121.  <LI><a href="#[5e]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32f407xx.o(.text)
    122. 

  122.  <LI><a href="#[5c]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
    123. 

  123.  <LI><a href="#[69]">prvIdleTask</a> from tasks.o(i.prvIdleTask) referenced from tasks.o(i.vTaskStartScheduler)
    124. 

  124.  <LI><a href="#[68]">prvTaskExitError</a> from port.o(i.prvTaskExitError) referenced from port.o(i.pxPortInitialiseStack)
    125. 

  125.  <LI><a href="#[6a]">prvTimerTask</a> from timers.o(i.prvTimerTask) referenced from timers.o(i.xTimerCreateTimerTask)
    126. 

  126. </UL>
    127. 

  127. <P>
    128. 

  128. <H3>
    129. 

  129. Global Symbols
    130. 

  130. </H3>
    131. 

  131. <P><STRONG><a name="[5e]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
    132. 

  132. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(.text)
    133. 

  133. </UL>
    134. 

  134. <P><STRONG><a name="[15a]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))
    135. 

  135. 

  136. <P><STRONG><a name="[6b]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    137. 

  137. <BR><BR>[Calls]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    138. 

  138. </UL>
    139. 

  139. 

  140. <P><STRONG><a name="[7d]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
    141. 

  141. <BR><BR>[Called By]<UL><LI><a href="#[6c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
    142. 

  142. </UL>
    143. 

  143. 

  144. <P><STRONG><a name="[15b]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))
    145. 

  145. 

  146. <P><STRONG><a name="[15c]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))
    147. 

  147. 

  148. <P><STRONG><a name="[15d]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))
    149. 

  149. 

  150. <P><STRONG><a name="[15e]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))
    151. 

  151. 

  152. <P><STRONG><a name="[15f]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))
    153. 

  153. 

  154. <P><STRONG><a name="[7]"></a>SVC_Handler</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, port.o(.emb_text))
    155. 

  155. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    156. 

  156. </UL>
    157. 

  157. <P><STRONG><a name="[152]"></a>__asm___6_port_c_39a90d8d__prvStartFirstTask</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, port.o(.emb_text))
    158. 

  158. <BR><BR>[Called By]<UL><LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
    159. 

  159. </UL>
    160. 

  160. 

  161. <P><STRONG><a name="[151]"></a>__asm___6_port_c_39a90d8d__prvEnableVFP</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, port.o(.emb_text))
    162. 

  162. <BR><BR>[Called By]<UL><LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
    163. 

  163. </UL>
    164. 

  164. 

  165. <P><STRONG><a name="[9]"></a>PendSV_Handler</STRONG> (Thumb, 88 bytes, Stack size 0 bytes, port.o(.emb_text))
    166. 

  166. <BR><BR>[Calls]<UL><LI><a href="#[6d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSwitchContext
    167. 

  167. </UL>
    168. 

  168. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    169. 

  169. </UL>
    170. 

  170. <P><STRONG><a name="[14a]"></a>vPortGetIPSR</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, port.o(.emb_text))
    171. 

  171. <BR><BR>[Called By]<UL><LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortValidateInterruptPriority
    172. 

  172. </UL>
    173. 

  173. 

  174. <P><STRONG><a name="[1]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    175. 

  175. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    176. 

  176. </UL>
    177. 

  177. <P><STRONG><a name="[1d]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    178. 

  178. <BR><BR>[Calls]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
    179. 

  179. </UL>
    180. 

  180. <BR>[Called By]<UL><LI><a href="#[1d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC_IRQHandler
    181. 

  181. </UL>
    182. 

  182. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    183. 

  183. </UL>
    184. 

  184. <P><STRONG><a name="[20]"></a>CAN1_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    185. 

  185. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    186. 

  186. </UL>
    187. 

  187. <P><STRONG><a name="[21]"></a>CAN1_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    188. 

  188. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    189. 

  189. </UL>
    190. 

  190. <P><STRONG><a name="[1e]"></a>CAN1_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    191. 

  191. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    192. 

  192. </UL>
    193. 

  193. <P><STRONG><a name="[4c]"></a>CAN2_RX1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    194. 

  194. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    195. 

  195. </UL>
    196. 

  196. <P><STRONG><a name="[4d]"></a>CAN2_SCE_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    197. 

  197. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    198. 

  198. </UL>
    199. 

  199. <P><STRONG><a name="[4a]"></a>CAN2_TX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    200. 

  200. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    201. 

  201. </UL>
    202. 

  202. <P><STRONG><a name="[59]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    203. 

  203. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    204. 

  204. </UL>
    205. 

  205. <P><STRONG><a name="[16]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    206. 

  206. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    207. 

  207. </UL>
    208. 

  208. <P><STRONG><a name="[18]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    209. 

  209. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    210. 

  210. </UL>
    211. 

  211. <P><STRONG><a name="[19]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    212. 

  212. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    213. 

  213. </UL>
    214. 

  214. <P><STRONG><a name="[1a]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    215. 

  215. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    216. 

  216. </UL>
    217. 

  217. <P><STRONG><a name="[1b]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    218. 

  218. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    219. 

  219. </UL>
    220. 

  220. <P><STRONG><a name="[1c]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    221. 

  221. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    222. 

  222. </UL>
    223. 

  223. <P><STRONG><a name="[3a]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    224. 

  224. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    225. 

  225. </UL>
    226. 

  226. <P><STRONG><a name="[43]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    227. 

  227. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    228. 

  228. </UL>
    229. 

  229. <P><STRONG><a name="[44]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    230. 

  230. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    231. 

  231. </UL>
    232. 

  232. <P><STRONG><a name="[46]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    233. 

  233. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    234. 

  234. </UL>
    235. 

  235. <P><STRONG><a name="[47]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    236. 

  236. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    237. 

  237. </UL>
    238. 

  238. <P><STRONG><a name="[4f]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    239. 

  239. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    240. 

  240. </UL>
    241. 

  241. <P><STRONG><a name="[50]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    242. 

  242. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    243. 

  243. </UL>
    244. 

  244. <P><STRONG><a name="[51]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    245. 

  245. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    246. 

  246. </UL>
    247. 

  247. <P><STRONG><a name="[48]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    248. 

  248. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    249. 

  249. </UL>
    250. 

  250. <P><STRONG><a name="[49]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    251. 

  251. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    252. 

  252. </UL>
    253. 

  253. <P><STRONG><a name="[11]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    254. 

  254. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    255. 

  255. </UL>
    256. 

  256. <P><STRONG><a name="[33]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    257. 

  257. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    258. 

  258. </UL>
    259. 

  259. <P><STRONG><a name="[12]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    260. 

  260. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    261. 

  261. </UL>
    262. 

  262. <P><STRONG><a name="[13]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    263. 

  263. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    264. 

  264. </UL>
    265. 

  265. <P><STRONG><a name="[14]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    266. 

  266. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    267. 

  267. </UL>
    268. 

  268. <P><STRONG><a name="[15]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    269. 

  269. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    270. 

  270. </UL>
    271. 

  271. <P><STRONG><a name="[22]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    272. 

  272. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    273. 

  273. </UL>
    274. 

  274. <P><STRONG><a name="[f]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    275. 

  275. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    276. 

  276. </UL>
    277. 

  277. <P><STRONG><a name="[3b]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    278. 

  278. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    279. 

  279. </UL>
    280. 

  280. <P><STRONG><a name="[5b]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    281. 

  281. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    282. 

  282. </UL>
    283. 

  283. <P><STRONG><a name="[5a]"></a>HASH_RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    284. 

  284. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    285. 

  285. </UL>
    286. 

  286. <P><STRONG><a name="[2b]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    287. 

  287. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    288. 

  288. </UL>
    289. 

  289. <P><STRONG><a name="[2a]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    290. 

  290. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    291. 

  291. </UL>
    292. 

  292. <P><STRONG><a name="[2d]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    293. 

  293. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    294. 

  294. </UL>
    295. 

  295. <P><STRONG><a name="[2c]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    296. 

  296. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    297. 

  297. </UL>
    298. 

  298. <P><STRONG><a name="[54]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    299. 

  299. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    300. 

  300. </UL>
    301. 

  301. <P><STRONG><a name="[53]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    302. 

  302. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    303. 

  303. </UL>
    304. 

  304. <P><STRONG><a name="[4e]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    305. 

  305. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    306. 

  306. </UL>
    307. 

  307. <P><STRONG><a name="[35]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    308. 

  308. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    309. 

  309. </UL>
    310. 

  310. <P><STRONG><a name="[56]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    311. 

  311. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    312. 

  312. </UL>
    313. 

  313. <P><STRONG><a name="[55]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    314. 

  314. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    315. 

  315. </UL>
    316. 

  316. <P><STRONG><a name="[58]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    317. 

  317. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    318. 

  318. </UL>
    319. 

  319. <P><STRONG><a name="[57]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    320. 

  320. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    321. 

  321. </UL>
    322. 

  322. <P><STRONG><a name="[c]"></a>PVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    323. 

  323. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    324. 

  324. </UL>
    325. 

  325. <P><STRONG><a name="[10]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    326. 

  326. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    327. 

  327. </UL>
    328. 

  328. <P><STRONG><a name="[34]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    329. 

  329. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    330. 

  330. </UL>
    331. 

  331. <P><STRONG><a name="[e]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    332. 

  332. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    333. 

  333. </UL>
    334. 

  334. <P><STRONG><a name="[3c]"></a>SDIO_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    335. 

  335. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    336. 

  336. </UL>
    337. 

  337. <P><STRONG><a name="[2e]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    338. 

  338. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    339. 

  339. </UL>
    340. 

  340. <P><STRONG><a name="[2f]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    341. 

  341. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    342. 

  342. </UL>
    343. 

  343. <P><STRONG><a name="[3e]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    344. 

  344. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    345. 

  345. </UL>
    346. 

  346. <P><STRONG><a name="[d]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    347. 

  347. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    348. 

  348. </UL>
    349. 

  349. <P><STRONG><a name="[23]"></a>TIM1_BRK_TIM9_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    350. 

  350. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    351. 

  351. </UL>
    352. 

  352. <P><STRONG><a name="[26]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    353. 

  353. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    354. 

  354. </UL>
    355. 

  355. <P><STRONG><a name="[25]"></a>TIM1_TRG_COM_TIM11_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    356. 

  356. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    357. 

  357. </UL>
    358. 

  358. <P><STRONG><a name="[24]"></a>TIM1_UP_TIM10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    359. 

  359. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    360. 

  360. </UL>
    361. 

  361. <P><STRONG><a name="[27]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    362. 

  362. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    363. 

  363. </UL>
    364. 

  364. <P><STRONG><a name="[28]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    365. 

  365. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    366. 

  366. </UL>
    367. 

  367. <P><STRONG><a name="[29]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    368. 

  368. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    369. 

  369. </UL>
    370. 

  370. <P><STRONG><a name="[3d]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    371. 

  371. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    372. 

  372. </UL>
    373. 

  373. <P><STRONG><a name="[42]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    374. 

  374. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    375. 

  375. </UL>
    376. 

  376. <P><STRONG><a name="[36]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    377. 

  377. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    378. 

  378. </UL>
    379. 

  379. <P><STRONG><a name="[39]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    380. 

  380. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    381. 

  381. </UL>
    382. 

  382. <P><STRONG><a name="[38]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    383. 

  383. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    384. 

  384. </UL>
    385. 

  385. <P><STRONG><a name="[37]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    386. 

  386. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    387. 

  387. </UL>
    388. 

  388. <P><STRONG><a name="[3f]"></a>UART4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    389. 

  389. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    390. 

  390. </UL>
    391. 

  391. <P><STRONG><a name="[40]"></a>UART5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    392. 

  392. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    393. 

  393. </UL>
    394. 

  394. <P><STRONG><a name="[31]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    395. 

  395. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    396. 

  396. </UL>
    397. 

  397. <P><STRONG><a name="[52]"></a>USART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    398. 

  398. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    399. 

  399. </UL>
    400. 

  400. <P><STRONG><a name="[b]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32f407xx.o(.text))
    401. 

  401. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    402. 

  402. </UL>
    403. 

  403. <P><STRONG><a name="[6e]"></a>__aeabi_uldivmod</STRONG> (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text))
    404. 

  404. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_uldivmod
    405. 

  405. </UL>
    406. 

  406. <BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    407. 

  407. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    408. 

  408. </UL>
    409. 

  409. <BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    410. 

  410. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    411. 

  411. </UL>
    412. 

  412. 

  413. <P><STRONG><a name="[10f]"></a>__aeabi_memcpy</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, memcpya.o(.text))
    414. 

  414. <BR><BR>[Called By]<UL><LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCopyDataToQueue
    415. 

  415. <LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCopyDataFromQueue
    416. 

  416. <LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_WriteNoCheck
    417. 

  417. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_WriteBlocking
    418. 

  418. </UL>
    419. 

  419. 

  420. <P><STRONG><a name="[160]"></a>__aeabi_memcpy4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
    421. 

  421. 

  422. <P><STRONG><a name="[161]"></a>__aeabi_memcpy8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memcpya.o(.text), UNUSED)
    423. 

  423. 

  424. <P><STRONG><a name="[72]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text))
    425. 

  425. <BR><BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
    426. 

  426. <LI><a href="#[73]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;memset
    427. 

  427. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    428. 

  428. </UL>
    429. 

  429. 

  430. <P><STRONG><a name="[162]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    431. 

  431. 

  432. <P><STRONG><a name="[163]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    433. 

  433. 

  434. <P><STRONG><a name="[71]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text))
    435. 

  435. <BR><BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    436. 

  436. </UL>
    437. 

  437. <BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Can_Handle
    438. 

  438. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Recive_Handle_Usart1
    439. 

  439. <LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Motion_Re
    440. 

  440. </UL>
    441. 

  441. 

  442. <P><STRONG><a name="[9d]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
    443. 

  443. <BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    444. 

  444. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    445. 

  445. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_MspInit
    446. 

  446. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    447. 

  447. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    448. 

  448. <LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    449. 

  449. <LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    450. 

  450. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_DoInit
    451. 

  451. </UL>
    452. 

  452. 

  453. <P><STRONG><a name="[164]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
    454. 

  454. 

  455. <P><STRONG><a name="[73]"></a>memset</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
    456. 

  456. <BR><BR>[Calls]<UL><LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    457. 

  457. </UL>
    458. 

  458. 

  459. <P><STRONG><a name="[74]"></a>__aeabi_dadd</STRONG> (Thumb, 322 bytes, Stack size 48 bytes, dadd.o(.text))
    460. 

  460. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    461. 

  461. </UL>
    462. 

  462. <BR>[Calls]<UL><LI><a href="#[75]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_lasr
    463. 

  463. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    464. 

  464. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    465. 

  465. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    466. 

  466. </UL>
    467. 

  467. <BR>[Called By]<UL><LI><a href="#[78]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dsub
    468. 

  468. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    469. 

  469. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    470. 

  470. </UL>
    471. 

  471. 

  472. <P><STRONG><a name="[78]"></a>__aeabi_dsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text), UNUSED)
    473. 

  473. <BR><BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    474. 

  474. </UL>
    475. 

  475. 

  476. <P><STRONG><a name="[79]"></a>__aeabi_drsub</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, dadd.o(.text))
    477. 

  477. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_drsub &rArr; __aeabi_dadd &rArr; _double_epilogue &rArr; _double_round
    478. 

  478. </UL>
    479. 

  479. <BR>[Calls]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    480. 

  480. </UL>
    481. 

  481. <BR>[Called By]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    482. 

  482. </UL>
    483. 

  483. 

  484. <P><STRONG><a name="[7a]"></a>__aeabi_dmul</STRONG> (Thumb, 228 bytes, Stack size 48 bytes, dmul.o(.text))
    485. 

  485. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    486. 

  486. </UL>
    487. 

  487. <BR>[Calls]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    488. 

  488. </UL>
    489. 

  489. <BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Motion_Re
    490. 

  490. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    491. 

  491. </UL>
    492. 

  492. 

  493. <P><STRONG><a name="[7b]"></a>__aeabi_i2d</STRONG> (Thumb, 34 bytes, Stack size 16 bytes, dflti.o(.text))
    494. 

  494. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = __aeabi_i2d &rArr; _double_epilogue &rArr; _double_round
    495. 

  495. </UL>
    496. 

  496. <BR>[Calls]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    497. 

  497. </UL>
    498. 

  498. <BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Motion_Re
    499. 

  499. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    500. 

  500. </UL>
    501. 

  501. 

  502. <P><STRONG><a name="[7c]"></a>__aeabi_d2iz</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, dfixi.o(.text))
    503. 

  503. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = __aeabi_d2iz
    504. 

  504. </UL>
    505. 

  505. <BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    506. 

  506. </UL>
    507. 

  507. <BR>[Called By]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Motion_Re
    508. 

  508. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    509. 

  509. </UL>
    510. 

  510. 

  511. <P><STRONG><a name="[165]"></a>__aeabi_cdcmpeq</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, cdcmple.o(.text), UNUSED)
    512. 

  512. 

  513. <P><STRONG><a name="[10e]"></a>__aeabi_cdcmple</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, cdcmple.o(.text))
    514. 

  514. <BR><BR>[Called By]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    515. 

  515. </UL>
    516. 

  516. 

  517. <P><STRONG><a name="[70]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
    518. 

  518. <BR><BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    519. 

  519. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    520. 

  520. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    521. 

  521. </UL>
    522. 

  522. 

  523. <P><STRONG><a name="[166]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)
    524. 

  524. 

  525. <P><STRONG><a name="[6f]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
    526. 

  526. <BR><BR>[Called By]<UL><LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
    527. 

  527. <LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    528. 

  528. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    529. 

  529. </UL>
    530. 

  530. 

  531. <P><STRONG><a name="[167]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)
    532. 

  532. 

  533. <P><STRONG><a name="[75]"></a>__aeabi_lasr</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, llsshr.o(.text))
    534. 

  534. <BR><BR>[Called By]<UL><LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    535. 

  535. </UL>
    536. 

  536. 

  537. <P><STRONG><a name="[168]"></a>_ll_sshift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llsshr.o(.text), UNUSED)
    538. 

  538. 

  539. <P><STRONG><a name="[169]"></a>__I$use$fp</STRONG> (Thumb, 0 bytes, Stack size 8 bytes, iusefp.o(.text), UNUSED)
    540. 

  540. 

  541. <P><STRONG><a name="[77]"></a>_double_round</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, depilogue.o(.text))
    542. 

  542. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _double_round
    543. 

  543. </UL>
    544. 

  544. <BR>[Called By]<UL><LI><a href="#[76]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_epilogue
    545. 

  545. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    546. 

  546. </UL>
    547. 

  547. 

  548. <P><STRONG><a name="[76]"></a>_double_epilogue</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, depilogue.o(.text))
    549. 

  549. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _double_epilogue &rArr; _double_round
    550. 

  550. </UL>
    551. 

  551. <BR>[Calls]<UL><LI><a href="#[6f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
    552. 

  552. <LI><a href="#[70]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
    553. 

  553. <LI><a href="#[77]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_double_round
    554. 

  554. </UL>
    555. 

  555. <BR>[Called By]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    556. 

  556. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    557. 

  557. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    558. 

  558. </UL>
    559. 

  559. 

  560. <P><STRONG><a name="[6c]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
    561. 

  561. <BR><BR>[Calls]<UL><LI><a href="#[7d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
    562. 

  562. </UL>
    563. 

  563. <BR>[Called By]<UL><LI><a href="#[6b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
    564. 

  564. </UL>
    565. 

  565. 

  566. <P><STRONG><a name="[16a]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)
    567. 

  567. 

  568. <P><STRONG><a name="[7e]"></a>BEED_DiDi</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, gpio.o(i.BEED_DiDi))
    569. 

  569. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = BEED_DiDi &rArr; HAL_Delay
    570. 

  570. </UL>
    571. 

  571. <BR>[Calls]<UL><LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_TogglePin
    572. 

  572. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    573. 

  573. </UL>
    574. 

  574. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    575. 

  575. </UL>
    576. 

  576. 

  577. <P><STRONG><a name="[5]"></a>BusFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.BusFault_Handler))
    578. 

  578. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    579. 

  579. </UL>
    580. 

  580. <P><STRONG><a name="[1f]"></a>CAN1_RX0_IRQHandler</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f4xx_it.o(i.CAN1_RX0_IRQHandler))
    581. 

  581. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = CAN1_RX0_IRQHandler &rArr; HAL_CAN_IRQHandler &rArr; HAL_CAN_RxFifo0MsgPendingCallback &rArr; HAL_CAN_GetRxMessage
    582. 

  582. </UL>
    583. 

  583. <BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    584. 

  584. </UL>
    585. 

  585. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    586. 

  586. </UL>
    587. 

  587. <P><STRONG><a name="[4b]"></a>CAN2_RX0_IRQHandler</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f4xx_it.o(i.CAN2_RX0_IRQHandler))
    588. 

  588. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = CAN2_RX0_IRQHandler &rArr; HAL_CAN_IRQHandler &rArr; HAL_CAN_RxFifo0MsgPendingCallback &rArr; HAL_CAN_GetRxMessage
    589. 

  589. </UL>
    590. 

  590. <BR>[Calls]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    591. 

  591. </UL>
    592. 

  592. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    593. 

  593. </UL>
    594. 

  594. <P><STRONG><a name="[82]"></a>CAN_ConfigFilter</STRONG> (Thumb, 120 bytes, Stack size 48 bytes, can.o(i.CAN_ConfigFilter))
    595. 

  595. <BR><BR>[Stack]<UL><LI>Max Depth = 68<LI>Call Chain = CAN_ConfigFilter &rArr; HAL_CAN_ConfigFilter
    596. 

  596. </UL>
    597. 

  597. <BR>[Calls]<UL><LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_Start
    598. 

  598. <LI><a href="#[83]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_ConfigFilter
    599. 

  599. <LI><a href="#[86]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_ActivateNotification
    600. 

  600. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    601. 

  601. </UL>
    602. 

  602. <BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_CAN_Init
    603. 

  603. </UL>
    604. 

  604. 

  605. <P><STRONG><a name="[60]"></a>Callback01</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, freertos.o(i.Callback01))
    606. 

  606. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = Callback01 &rArr; HAL_GPIO_TogglePin
    607. 

  607. </UL>
    608. 

  608. <BR>[Calls]<UL><LI><a href="#[88]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortGetMinimumEverFreeHeapSize
    609. 

  609. <LI><a href="#[87]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortGetFreeHeapSize
    610. 

  610. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_TogglePin
    611. 

  611. </UL>
    612. 

  612. <BR>[Address Reference Count : 1]<UL><LI> freertos.o(i.MX_FREERTOS_Init)
    613. 

  613. </UL>
    614. 

  614. <P><STRONG><a name="[89]"></a>Can_Drive_Send</STRONG> (Thumb, 396 bytes, Stack size 40 bytes, motion_model.o(i.Can_Drive_Send))
    615. 

  615. <BR><BR>[Stack]<UL><LI>Max Depth = 560<LI>Call Chain = Can_Drive_Send &rArr; can_send_msg &rArr; SEGGER_RTT_printf &rArr; SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    616. 

  616. </UL>
    617. 

  617. <BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send_msg
    618. 

  618. </UL>
    619. 

  619. <BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Can_Handle
    620. 

  620. </UL>
    621. 

  621. 

  622. <P><STRONG><a name="[8b]"></a>Can_Drive_Stop</STRONG> (Thumb, 194 bytes, Stack size 24 bytes, motion_model.o(i.Can_Drive_Stop))
    623. 

  623. <BR><BR>[Stack]<UL><LI>Max Depth = 544<LI>Call Chain = Can_Drive_Stop &rArr; can_send_msg &rArr; SEGGER_RTT_printf &rArr; SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    624. 

  624. </UL>
    625. 

  625. <BR>[Calls]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send_msg
    626. 

  626. </UL>
    627. 

  627. <BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Can_Handle
    628. 

  628. </UL>
    629. 

  629. 

  630. <P><STRONG><a name="[17]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f4xx_it.o(i.DMA1_Stream1_IRQHandler))
    631. 

  631. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = DMA1_Stream1_IRQHandler &rArr; HAL_DMA_IRQHandler
    632. 

  632. </UL>
    633. 

  633. <BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
    634. 

  634. </UL>
    635. 

  635. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    636. 

  636. </UL>
    637. 

  637. <P><STRONG><a name="[45]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f4xx_it.o(i.DMA2_Stream2_IRQHandler))
    638. 

  638. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = DMA2_Stream2_IRQHandler &rArr; HAL_DMA_IRQHandler
    639. 

  639. </UL>
    640. 

  640. <BR>[Calls]<UL><LI><a href="#[8c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_IRQHandler
    641. 

  641. </UL>
    642. 

  642. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    643. 

  643. </UL>
    644. 

  644. <P><STRONG><a name="[8]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.DebugMon_Handler))
    645. 

  645. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    646. 

  646. </UL>
    647. 

  647. <P><STRONG><a name="[84]"></a>Error_Handler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, main.o(i.Error_Handler))
    648. 

  648. <BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    649. 

  649. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_ConfigFilter
    650. 

  650. <LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART3_UART_Init
    651. 

  651. <LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
    652. 

  652. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    653. 

  653. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    654. 

  654. <LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_CAN_Init
    655. 

  655. <LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    656. 

  656. </UL>
    657. 

  657. 

  658. <P><STRONG><a name="[86]"></a>HAL_CAN_ActivateNotification</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_ActivateNotification))
    659. 

  659. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_CAN_ActivateNotification
    660. 

  660. </UL>
    661. 

  661. <BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_ConfigFilter
    662. 

  662. </UL>
    663. 

  663. 

  664. <P><STRONG><a name="[110]"></a>HAL_CAN_AddTxMessage</STRONG> (Thumb, 342 bytes, Stack size 20 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_AddTxMessage))
    665. 

  665. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_CAN_AddTxMessage
    666. 

  666. </UL>
    667. 

  667. <BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send_msg
    668. 

  668. </UL>
    669. 

  669. 

  670. <P><STRONG><a name="[83]"></a>HAL_CAN_ConfigFilter</STRONG> (Thumb, 286 bytes, Stack size 20 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_ConfigFilter))
    671. 

  671. <BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = HAL_CAN_ConfigFilter
    672. 

  672. </UL>
    673. 

  673. <BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_ConfigFilter
    674. 

  674. </UL>
    675. 

  675. 

  676. <P><STRONG><a name="[99]"></a>HAL_CAN_ErrorCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_ErrorCallback))
    677. 

  677. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    678. 

  678. </UL>
    679. 

  679. 

  680. <P><STRONG><a name="[a1]"></a>HAL_CAN_GetRxFifoFillLevel</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_GetRxFifoFillLevel))
    681. 

  681. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_CAN_GetRxFifoFillLevel
    682. 

  682. </UL>
    683. 

  683. <BR>[Called By]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_RxFifo0MsgPendingCallback
    684. 

  684. </UL>
    685. 

  685. 

  686. <P><STRONG><a name="[a2]"></a>HAL_CAN_GetRxMessage</STRONG> (Thumb, 378 bytes, Stack size 16 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_GetRxMessage))
    687. 

  687. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_CAN_GetRxMessage
    688. 

  688. </UL>
    689. 

  689. <BR>[Called By]<UL><LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_RxFifo0MsgPendingCallback
    690. 

  690. </UL>
    691. 

  691. 

  692. <P><STRONG><a name="[111]"></a>HAL_CAN_GetTxMailboxesFreeLevel</STRONG> (Thumb, 54 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_GetTxMailboxesFreeLevel))
    693. 

  693. <BR><BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send_msg
    694. 

  694. </UL>
    695. 

  695. 

  696. <P><STRONG><a name="[81]"></a>HAL_CAN_IRQHandler</STRONG> (Thumb, 590 bytes, Stack size 40 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_IRQHandler))
    697. 

  697. <BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = HAL_CAN_IRQHandler &rArr; HAL_CAN_RxFifo0MsgPendingCallback &rArr; HAL_CAN_GetRxMessage
    698. 

  698. </UL>
    699. 

  699. <BR>[Calls]<UL><LI><a href="#[98]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_WakeUpFromRxMsgCallback
    700. 

  700. <LI><a href="#[91]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_TxMailbox2CompleteCallback
    701. 

  701. <LI><a href="#[92]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_TxMailbox2AbortCallback
    702. 

  702. <LI><a href="#[8f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_TxMailbox1CompleteCallback
    703. 

  703. <LI><a href="#[90]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_TxMailbox1AbortCallback
    704. 

  704. <LI><a href="#[8d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_TxMailbox0CompleteCallback
    705. 

  705. <LI><a href="#[8e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_TxMailbox0AbortCallback
    706. 

  706. <LI><a href="#[97]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_SleepCallback
    707. 

  707. <LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_RxFifo1MsgPendingCallback
    708. 

  708. <LI><a href="#[95]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_RxFifo1FullCallback
    709. 

  709. <LI><a href="#[93]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_RxFifo0FullCallback
    710. 

  710. <LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_ErrorCallback
    711. 

  711. <LI><a href="#[94]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_RxFifo0MsgPendingCallback
    712. 

  712. </UL>
    713. 

  713. <BR>[Called By]<UL><LI><a href="#[4b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN2_RX0_IRQHandler
    714. 

  714. <LI><a href="#[1f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN1_RX0_IRQHandler
    715. 

  715. </UL>
    716. 

  716. 

  717. <P><STRONG><a name="[9a]"></a>HAL_CAN_Init</STRONG> (Thumb, 372 bytes, Stack size 16 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_Init))
    718. 

  718. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = HAL_CAN_Init &rArr; HAL_CAN_MspInit &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    719. 

  719. </UL>
    720. 

  720. <BR>[Calls]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_MspInit
    721. 

  721. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    722. 

  722. </UL>
    723. 

  723. <BR>[Called By]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_CAN_Init
    724. 

  724. </UL>
    725. 

  725. 

  726. <P><STRONG><a name="[9b]"></a>HAL_CAN_MspInit</STRONG> (Thumb, 332 bytes, Stack size 32 bytes, can.o(i.HAL_CAN_MspInit))
    727. 

  727. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_CAN_MspInit &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    728. 

  728. </UL>
    729. 

  729. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    730. 

  730. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    731. 

  731. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    732. 

  732. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    733. 

  733. </UL>
    734. 

  734. <BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_Init
    735. 

  735. </UL>
    736. 

  736. 

  737. <P><STRONG><a name="[93]"></a>HAL_CAN_RxFifo0FullCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_RxFifo0FullCallback))
    738. 

  738. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    739. 

  739. </UL>
    740. 

  740. 

  741. <P><STRONG><a name="[94]"></a>HAL_CAN_RxFifo0MsgPendingCallback</STRONG> (Thumb, 210 bytes, Stack size 104 bytes, bsp.o(i.HAL_CAN_RxFifo0MsgPendingCallback))
    742. 

  742. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = HAL_CAN_RxFifo0MsgPendingCallback &rArr; HAL_CAN_GetRxMessage
    743. 

  743. </UL>
    744. 

  744. <BR>[Calls]<UL><LI><a href="#[a2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_GetRxMessage
    745. 

  745. <LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_GetRxFifoFillLevel
    746. 

  746. </UL>
    747. 

  747. <BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    748. 

  748. </UL>
    749. 

  749. 

  750. <P><STRONG><a name="[95]"></a>HAL_CAN_RxFifo1FullCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_RxFifo1FullCallback))
    751. 

  751. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    752. 

  752. </UL>
    753. 

  753. 

  754. <P><STRONG><a name="[96]"></a>HAL_CAN_RxFifo1MsgPendingCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_RxFifo1MsgPendingCallback))
    755. 

  755. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    756. 

  756. </UL>
    757. 

  757. 

  758. <P><STRONG><a name="[97]"></a>HAL_CAN_SleepCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_SleepCallback))
    759. 

  759. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    760. 

  760. </UL>
    761. 

  761. 

  762. <P><STRONG><a name="[85]"></a>HAL_CAN_Start</STRONG> (Thumb, 94 bytes, Stack size 16 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_Start))
    763. 

  763. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_CAN_Start
    764. 

  764. </UL>
    765. 

  765. <BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    766. 

  766. </UL>
    767. 

  767. <BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_ConfigFilter
    768. 

  768. </UL>
    769. 

  769. 

  770. <P><STRONG><a name="[8e]"></a>HAL_CAN_TxMailbox0AbortCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_TxMailbox0AbortCallback))
    771. 

  771. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    772. 

  772. </UL>
    773. 

  773. 

  774. <P><STRONG><a name="[8d]"></a>HAL_CAN_TxMailbox0CompleteCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_TxMailbox0CompleteCallback))
    775. 

  775. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    776. 

  776. </UL>
    777. 

  777. 

  778. <P><STRONG><a name="[90]"></a>HAL_CAN_TxMailbox1AbortCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_TxMailbox1AbortCallback))
    779. 

  779. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    780. 

  780. </UL>
    781. 

  781. 

  782. <P><STRONG><a name="[8f]"></a>HAL_CAN_TxMailbox1CompleteCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_TxMailbox1CompleteCallback))
    783. 

  783. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    784. 

  784. </UL>
    785. 

  785. 

  786. <P><STRONG><a name="[92]"></a>HAL_CAN_TxMailbox2AbortCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_TxMailbox2AbortCallback))
    787. 

  787. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    788. 

  788. </UL>
    789. 

  789. 

  790. <P><STRONG><a name="[91]"></a>HAL_CAN_TxMailbox2CompleteCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_TxMailbox2CompleteCallback))
    791. 

  791. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    792. 

  792. </UL>
    793. 

  793. 

  794. <P><STRONG><a name="[98]"></a>HAL_CAN_WakeUpFromRxMsgCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_can.o(i.HAL_CAN_WakeUpFromRxMsgCallback))
    795. 

  795. <BR><BR>[Called By]<UL><LI><a href="#[81]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_IRQHandler
    796. 

  796. </UL>
    797. 

  797. 

  798. <P><STRONG><a name="[a3]"></a>HAL_DMA_Abort</STRONG> (Thumb, 172 bytes, Stack size 16 bytes, stm32f4xx_hal_dma.o(i.HAL_DMA_Abort))
    799. 

  799. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_DMA_Abort
    800. 

  800. </UL>
    801. 

  801. <BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    802. 

  802. </UL>
    803. 

  803. <BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    804. 

  804. <LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
    805. 

  805. </UL>
    806. 

  806. 

  807. <P><STRONG><a name="[d8]"></a>HAL_DMA_Abort_IT</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, stm32f4xx_hal_dma.o(i.HAL_DMA_Abort_IT))
    808. 

  808. <BR><BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    809. 

  809. </UL>
    810. 

  810. 

  811. <P><STRONG><a name="[8c]"></a>HAL_DMA_IRQHandler</STRONG> (Thumb, 570 bytes, Stack size 24 bytes, stm32f4xx_hal_dma.o(i.HAL_DMA_IRQHandler))
    812. 

  812. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_DMA_IRQHandler
    813. 

  813. </UL>
    814. 

  814. <BR>[Called By]<UL><LI><a href="#[45]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA2_Stream2_IRQHandler
    815. 

  815. <LI><a href="#[17]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA1_Stream1_IRQHandler
    816. 

  816. </UL>
    817. 

  817. 

  818. <P><STRONG><a name="[a4]"></a>HAL_DMA_Init</STRONG> (Thumb, 232 bytes, Stack size 24 bytes, stm32f4xx_hal_dma.o(i.HAL_DMA_Init))
    819. 

  819. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_DMA_Init
    820. 

  820. </UL>
    821. 

  821. <BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    822. 

  822. <LI><a href="#[a5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_CheckFifoParam
    823. 

  823. <LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_CalcBaseAndBitshift
    824. 

  824. </UL>
    825. 

  825. <BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    826. 

  826. </UL>
    827. 

  827. 

  828. <P><STRONG><a name="[a7]"></a>HAL_DMA_Start_IT</STRONG> (Thumb, 146 bytes, Stack size 32 bytes, stm32f4xx_hal_dma.o(i.HAL_DMA_Start_IT))
    829. 

  829. <BR><BR>[Stack]<UL><LI>Max Depth = 44<LI>Call Chain = HAL_DMA_Start_IT &rArr; DMA_SetConfig
    830. 

  830. </UL>
    831. 

  831. <BR>[Calls]<UL><LI><a href="#[a8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_SetConfig
    832. 

  832. </UL>
    833. 

  833. <BR>[Called By]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Start_Receive_DMA
    834. 

  834. </UL>
    835. 

  835. 

  836. <P><STRONG><a name="[80]"></a>HAL_Delay</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, stm32f4xx_hal.o(i.HAL_Delay))
    837. 

  837. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_Delay
    838. 

  838. </UL>
    839. 

  839. <BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    840. 

  840. </UL>
    841. 

  841. <BR>[Called By]<UL><LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BEED_DiDi
    842. 

  842. </UL>
    843. 

  843. 

  844. <P><STRONG><a name="[9e]"></a>HAL_GPIO_Init</STRONG> (Thumb, 454 bytes, Stack size 24 bytes, stm32f4xx_hal_gpio.o(i.HAL_GPIO_Init))
    845. 

  845. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_GPIO_Init
    846. 

  846. </UL>
    847. 

  847. <BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    848. 

  848. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    849. 

  849. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_MspInit
    850. 

  850. <LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    851. 

  851. </UL>
    852. 

  852. 

  853. <P><STRONG><a name="[7f]"></a>HAL_GPIO_TogglePin</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, stm32f4xx_hal_gpio.o(i.HAL_GPIO_TogglePin))
    854. 

  854. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_GPIO_TogglePin
    855. 

  855. </UL>
    856. 

  856. <BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
    857. 

  857. <LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Callback01
    858. 

  858. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BEED_DiDi
    859. 

  859. </UL>
    860. 

  860. 

  861. <P><STRONG><a name="[e8]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32f4xx_hal_gpio.o(i.HAL_GPIO_WritePin))
    862. 

  862. <BR><BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    863. 

  863. </UL>
    864. 

  864. 

  865. <P><STRONG><a name="[9c]"></a>HAL_GetTick</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_hal.o(i.HAL_GetTick))
    866. 

  866. <BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
    867. 

  867. <LI><a href="#[85]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_Start
    868. 

  868. <LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_Init
    869. 

  869. <LI><a href="#[80]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Delay
    870. 

  870. <LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    871. 

  871. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    872. 

  872. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
    873. 

  873. </UL>
    874. 

  874. 

  875. <P><STRONG><a name="[104]"></a>HAL_IWDG_Refresh</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, stm32f4xx_hal_iwdg.o(i.HAL_IWDG_Refresh))
    876. 

  876. <BR><BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
    877. 

  877. </UL>
    878. 

  878. 

  879. <P><STRONG><a name="[d1]"></a>HAL_IncTick</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, stm32f4xx_hal.o(i.HAL_IncTick))
    880. 

  880. <BR><BR>[Called By]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PeriodElapsedCallback
    881. 

  881. </UL>
    882. 

  882. 

  883. <P><STRONG><a name="[a9]"></a>HAL_Init</STRONG> (Thumb, 54 bytes, Stack size 8 bytes, stm32f4xx_hal.o(i.HAL_Init))
    884. 

  884. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    885. 

  885. </UL>
    886. 

  886. <BR>[Calls]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    887. 

  887. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
    888. 

  888. <LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
    889. 

  889. </UL>
    890. 

  890. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    891. 

  891. </UL>
    892. 

  892. 

  893. <P><STRONG><a name="[ab]"></a>HAL_InitTick</STRONG> (Thumb, 160 bytes, Stack size 56 bytes, stm32f4xx_hal_timebase_tim.o(i.HAL_InitTick))
    894. 

  894. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    895. 

  895. </UL>
    896. 

  896. <BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    897. 

  897. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    898. 

  898. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    899. 

  899. <LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Start_IT
    900. 

  900. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
    901. 

  901. <LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetClockConfig
    902. 

  902. </UL>
    903. 

  903. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    904. 

  904. <LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    905. 

  905. </UL>
    906. 

  906. 

  907. <P><STRONG><a name="[ac]"></a>HAL_MspInit</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, stm32f4xx_hal_msp.o(i.HAL_MspInit))
    908. 

  908. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = HAL_MspInit &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    909. 

  909. </UL>
    910. 

  910. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    911. 

  911. </UL>
    912. 

  912. <BR>[Called By]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    913. 

  913. </UL>
    914. 

  914. 

  915. <P><STRONG><a name="[a0]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f4xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ))
    916. 

  916. <BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    917. 

  917. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_MspInit
    918. 

  918. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
    919. 

  919. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    920. 

  920. </UL>
    921. 

  921. 

  922. <P><STRONG><a name="[9f]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 124 bytes, Stack size 40 bytes, stm32f4xx_hal_cortex.o(i.HAL_NVIC_SetPriority))
    923. 

  923. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    924. 

  924. </UL>
    925. 

  925. <BR>[Calls]<UL><LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
    926. 

  926. <LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_GetPriorityGrouping
    927. 

  927. </UL>
    928. 

  928. <BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    929. 

  929. <LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_MspInit
    930. 

  930. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
    931. 

  931. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    932. 

  932. <LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
    933. 

  933. </UL>
    934. 

  934. 

  935. <P><STRONG><a name="[aa]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, stm32f4xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping))
    936. 

  936. <BR><BR>[Called By]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    937. 

  937. </UL>
    938. 

  938. 

  939. <P><STRONG><a name="[b3]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 368 bytes, Stack size 16 bytes, stm32f4xx_hal_rcc.o(i.HAL_RCC_ClockConfig))
    940. 

  940. <BR><BR>[Stack]<UL><LI>Max Depth = 120<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    941. 

  941. </UL>
    942. 

  942. <BR>[Calls]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
    943. 

  943. <LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    944. 

  944. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    945. 

  945. </UL>
    946. 

  946. <BR>[Called By]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    947. 

  947. </UL>
    948. 

  948. 

  949. <P><STRONG><a name="[ad]"></a>HAL_RCC_GetClockConfig</STRONG> (Thumb, 58 bytes, Stack size 0 bytes, stm32f4xx_hal_rcc.o(i.HAL_RCC_GetClockConfig))
    950. 

  950. <BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    951. 

  951. </UL>
    952. 

  952. 

  953. <P><STRONG><a name="[b5]"></a>HAL_RCC_GetHCLKFreq</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32f4xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq))
    954. 

  954. <BR><BR>[Called By]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
    955. 

  955. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
    956. 

  956. </UL>
    957. 

  957. 

  958. <P><STRONG><a name="[ae]"></a>HAL_RCC_GetPCLK1Freq</STRONG> (Thumb, 22 bytes, Stack size 4 bytes, stm32f4xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq))
    959. 

  959. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_RCC_GetPCLK1Freq
    960. 

  960. </UL>
    961. 

  961. <BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    962. 

  962. </UL>
    963. 

  963. <BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    964. 

  964. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    965. 

  965. </UL>
    966. 

  966. 

  967. <P><STRONG><a name="[b6]"></a>HAL_RCC_GetPCLK2Freq</STRONG> (Thumb, 22 bytes, Stack size 4 bytes, stm32f4xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq))
    968. 

  968. <BR><BR>[Stack]<UL><LI>Max Depth = 4<LI>Call Chain = HAL_RCC_GetPCLK2Freq
    969. 

  969. </UL>
    970. 

  970. <BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
    971. 

  971. </UL>
    972. 

  972. <BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    973. 

  973. </UL>
    974. 

  974. 

  975. <P><STRONG><a name="[b4]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 162 bytes, Stack size 32 bytes, stm32f4xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq))
    976. 

  976. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_RCC_GetSysClockFreq &rArr; __aeabi_uldivmod
    977. 

  977. </UL>
    978. 

  978. <BR>[Calls]<UL><LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    979. 

  979. </UL>
    980. 

  980. <BR>[Called By]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    981. 

  981. </UL>
    982. 

  982. 

  983. <P><STRONG><a name="[b7]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 1172 bytes, Stack size 24 bytes, stm32f4xx_hal_rcc.o(i.HAL_RCC_OscConfig))
    984. 

  984. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = HAL_RCC_OscConfig
    985. 

  985. </UL>
    986. 

  986. <BR>[Calls]<UL><LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
    987. 

  987. </UL>
    988. 

  988. <BR>[Called By]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    989. 

  989. </UL>
    990. 

  990. 

  991. <P><STRONG><a name="[c4]"></a>HAL_TIMEx_BreakCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_tim_ex.o(i.HAL_TIMEx_BreakCallback))
    992. 

  992. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    993. 

  993. </UL>
    994. 

  994. 

  995. <P><STRONG><a name="[c6]"></a>HAL_TIMEx_CommutCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_tim_ex.o(i.HAL_TIMEx_CommutCallback))
    996. 

  996. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    997. 

  997. </UL>
    998. 

  998. 

  999. <P><STRONG><a name="[ea]"></a>HAL_TIMEx_MasterConfigSynchronization</STRONG> (Thumb, 150 bytes, Stack size 12 bytes, stm32f4xx_hal_tim_ex.o(i.HAL_TIMEx_MasterConfigSynchronization))
    1000. 

  1000. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_TIMEx_MasterConfigSynchronization
    1001. 

  1001. </UL>
    1002. 

  1002. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1003. 

  1003. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1004. 

  1004. </UL>
    1005. 

  1005. 

  1006. <P><STRONG><a name="[af]"></a>HAL_TIM_Base_Init</STRONG> (Thumb, 102 bytes, Stack size 8 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_Base_Init))
    1007. 

  1007. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIM_Base_Init &rArr; HAL_TIM_Base_MspInit
    1008. 

  1008. </UL>
    1009. 

  1009. <BR>[Calls]<UL><LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_MspInit
    1010. 

  1010. <LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
    1011. 

  1011. </UL>
    1012. 

  1012. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1013. 

  1013. <LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1014. 

  1014. </UL>
    1015. 

  1015. 

  1016. <P><STRONG><a name="[b8]"></a>HAL_TIM_Base_MspInit</STRONG> (Thumb, 88 bytes, Stack size 8 bytes, tim.o(i.HAL_TIM_Base_MspInit))
    1017. 

  1017. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_TIM_Base_MspInit
    1018. 

  1018. </UL>
    1019. 

  1019. <BR>[Called By]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    1020. 

  1020. </UL>
    1021. 

  1021. 

  1022. <P><STRONG><a name="[b0]"></a>HAL_TIM_Base_Start_IT</STRONG> (Thumb, 138 bytes, Stack size 0 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_Base_Start_IT))
    1023. 

  1023. <BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
    1024. 

  1024. </UL>
    1025. 

  1025. 

  1026. <P><STRONG><a name="[ba]"></a>HAL_TIM_ConfigClockSource</STRONG> (Thumb, 268 bytes, Stack size 24 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_ConfigClockSource))
    1027. 

  1027. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_TIM_ConfigClockSource &rArr; TIM_TI2_ConfigInputStage
    1028. 

  1028. </UL>
    1029. 

  1029. <BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI2_ConfigInputStage
    1030. 

  1030. <LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_TI1_ConfigInputStage
    1031. 

  1031. <LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ITRx_SetConfig
    1032. 

  1032. <LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_ETR_SetConfig
    1033. 

  1033. </UL>
    1034. 

  1034. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1035. 

  1035. </UL>
    1036. 

  1036. 

  1037. <P><STRONG><a name="[c0]"></a>HAL_TIM_IC_CaptureCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_IC_CaptureCallback))
    1038. 

  1038. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1039. 

  1039. </UL>
    1040. 

  1040. 

  1041. <P><STRONG><a name="[bf]"></a>HAL_TIM_IRQHandler</STRONG> (Thumb, 406 bytes, Stack size 8 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_IRQHandler))
    1042. 

  1042. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIM_IRQHandler &rArr; HAL_TIM_PeriodElapsedCallback
    1043. 

  1043. </UL>
    1044. 

  1044. <BR>[Calls]<UL><LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PeriodElapsedCallback
    1045. 

  1045. <LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_TriggerCallback
    1046. 

  1046. <LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_PulseFinishedCallback
    1047. 

  1047. <LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_OC_DelayElapsedCallback
    1048. 

  1048. <LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IC_CaptureCallback
    1049. 

  1049. <LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_CommutCallback
    1050. 

  1050. <LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_BreakCallback
    1051. 

  1051. </UL>
    1052. 

  1052. <BR>[Called By]<UL><LI><a href="#[41]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM6_DAC_IRQHandler
    1053. 

  1053. </UL>
    1054. 

  1054. 

  1055. <P><STRONG><a name="[c7]"></a>HAL_TIM_MspPostInit</STRONG> (Thumb, 220 bytes, Stack size 32 bytes, tim.o(i.HAL_TIM_MspPostInit))
    1056. 

  1056. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1057. 

  1057. </UL>
    1058. 

  1058. <BR>[Calls]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1059. 

  1059. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1060. 

  1060. </UL>
    1061. 

  1061. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1062. 

  1062. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1063. 

  1063. </UL>
    1064. 

  1064. 

  1065. <P><STRONG><a name="[c1]"></a>HAL_TIM_OC_DelayElapsedCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_OC_DelayElapsedCallback))
    1066. 

  1066. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1067. 

  1067. </UL>
    1068. 

  1068. 

  1069. <P><STRONG><a name="[c8]"></a>HAL_TIM_PWM_ConfigChannel</STRONG> (Thumb, 260 bytes, Stack size 24 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_PWM_ConfigChannel))
    1070. 

  1070. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_TIM_PWM_ConfigChannel &rArr; TIM_OC4_SetConfig
    1071. 

  1071. </UL>
    1072. 

  1072. <BR>[Calls]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC4_SetConfig
    1073. 

  1073. <LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC3_SetConfig
    1074. 

  1074. <LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC1_SetConfig
    1075. 

  1075. <LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_OC2_SetConfig
    1076. 

  1076. </UL>
    1077. 

  1077. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1078. 

  1078. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1079. 

  1079. </UL>
    1080. 

  1080. 

  1081. <P><STRONG><a name="[cd]"></a>HAL_TIM_PWM_Init</STRONG> (Thumb, 102 bytes, Stack size 8 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_PWM_Init))
    1082. 

  1082. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_TIM_PWM_Init &rArr; HAL_TIM_PWM_MspInit
    1083. 

  1083. </UL>
    1084. 

  1084. <BR>[Calls]<UL><LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_MspInit
    1085. 

  1085. <LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_Base_SetConfig
    1086. 

  1086. </UL>
    1087. 

  1087. <BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1088. 

  1088. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1089. 

  1089. </UL>
    1090. 

  1090. 

  1091. <P><STRONG><a name="[ce]"></a>HAL_TIM_PWM_MspInit</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, tim.o(i.HAL_TIM_PWM_MspInit))
    1092. 

  1092. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_TIM_PWM_MspInit
    1093. 

  1093. </UL>
    1094. 

  1094. <BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1095. 

  1095. </UL>
    1096. 

  1096. 

  1097. <P><STRONG><a name="[c2]"></a>HAL_TIM_PWM_PulseFinishedCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_PWM_PulseFinishedCallback))
    1098. 

  1098. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1099. 

  1099. </UL>
    1100. 

  1100. 

  1101. <P><STRONG><a name="[cf]"></a>HAL_TIM_PWM_Start</STRONG> (Thumb, 238 bytes, Stack size 16 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_PWM_Start))
    1102. 

  1102. <BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_TIM_PWM_Start &rArr; TIM_CCxChannelCmd
    1103. 

  1103. </UL>
    1104. 

  1104. <BR>[Calls]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TIM_CCxChannelCmd
    1105. 

  1105. </UL>
    1106. 

  1106. <BR>[Called By]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Start
    1107. 

  1107. </UL>
    1108. 

  1108. 

  1109. <P><STRONG><a name="[c3]"></a>HAL_TIM_PeriodElapsedCallback</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, main.o(i.HAL_TIM_PeriodElapsedCallback))
    1110. 

  1110. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_TIM_PeriodElapsedCallback
    1111. 

  1111. </UL>
    1112. 

  1112. <BR>[Calls]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
    1113. 

  1113. </UL>
    1114. 

  1114. <BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1115. 

  1115. </UL>
    1116. 

  1116. 

  1117. <P><STRONG><a name="[d2]"></a>HAL_TIM_Start</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, tim.o(i.HAL_TIM_Start))
    1118. 

  1118. <BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_TIM_Start &rArr; HAL_TIM_PWM_Start &rArr; TIM_CCxChannelCmd
    1119. 

  1119. </UL>
    1120. 

  1120. <BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Start
    1121. 

  1121. </UL>
    1122. 

  1122. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1123. 

  1123. </UL>
    1124. 

  1124. 

  1125. <P><STRONG><a name="[c5]"></a>HAL_TIM_TriggerCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_tim.o(i.HAL_TIM_TriggerCallback))
    1126. 

  1126. <BR><BR>[Called By]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1127. 

  1127. </UL>
    1128. 

  1128. 

  1129. <P><STRONG><a name="[da]"></a>HAL_UARTEx_RxEventCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.HAL_UARTEx_RxEventCallback))
    1130. 

  1130. <BR><BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    1131. 

  1131. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Receive_IT
    1132. 

  1132. <LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMARxHalfCplt
    1133. 

  1133. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAReceiveCplt
    1134. 

  1134. </UL>
    1135. 

  1135. 

  1136. <P><STRONG><a name="[d3]"></a>HAL_UART_DMAStop</STRONG> (Thumb, 138 bytes, Stack size 16 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_DMAStop))
    1137. 

  1137. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_UART_DMAStop &rArr; HAL_DMA_Abort
    1138. 

  1138. </UL>
    1139. 

  1139. <BR>[Calls]<UL><LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
    1140. 

  1140. <LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTxTransfer
    1141. 

  1141. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
    1142. 

  1142. </UL>
    1143. 

  1143. <BR>[Called By]<UL><LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1144. 

  1144. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
    1145. 

  1145. </UL>
    1146. 

  1146. 

  1147. <P><STRONG><a name="[d9]"></a>HAL_UART_ErrorCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_ErrorCallback))
    1148. 

  1148. <BR><BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    1149. 

  1149. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
    1150. 

  1150. <LI><a href="#[5f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAAbortOnError
    1151. 

  1151. </UL>
    1152. 

  1152. 

  1153. <P><STRONG><a name="[d6]"></a>HAL_UART_IRQHandler</STRONG> (Thumb, 732 bytes, Stack size 40 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_IRQHandler))
    1154. 

  1154. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_UART_IRQHandler &rArr; UART_Receive_IT
    1155. 

  1155. </UL>
    1156. 

  1156. <BR>[Calls]<UL><LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort_IT
    1157. 

  1157. <LI><a href="#[a3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
    1158. 

  1158. <LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
    1159. 

  1159. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
    1160. 

  1160. <LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Transmit_IT
    1161. 

  1161. <LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Receive_IT
    1162. 

  1162. <LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTransmit_IT
    1163. 

  1163. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
    1164. 

  1164. </UL>
    1165. 

  1165. <BR>[Called By]<UL><LI><a href="#[32]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART3_IRQHandler
    1166. 

  1166. <LI><a href="#[30]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;USART1_IRQHandler
    1167. 

  1167. </UL>
    1168. 

  1168. 

  1169. <P><STRONG><a name="[dd]"></a>HAL_UART_Init</STRONG> (Thumb, 114 bytes, Stack size 8 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_Init))
    1170. 

  1170. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1171. 

  1171. </UL>
    1172. 

  1172. <BR>[Calls]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
    1173. 

  1173. <LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
    1174. 

  1174. </UL>
    1175. 

  1175. <BR>[Called By]<UL><LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART3_UART_Init
    1176. 

  1176. <LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
    1177. 

  1177. </UL>
    1178. 

  1178. 

  1179. <P><STRONG><a name="[de]"></a>HAL_UART_MspInit</STRONG> (Thumb, 396 bytes, Stack size 32 bytes, usart.o(i.HAL_UART_MspInit))
    1180. 

  1180. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_UART_MspInit &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1181. 

  1181. </UL>
    1182. 

  1182. <BR>[Calls]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
    1183. 

  1183. <LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1184. 

  1184. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    1185. 

  1185. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1186. 

  1186. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1187. 

  1187. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1188. 

  1188. </UL>
    1189. 

  1189. <BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1190. 

  1190. </UL>
    1191. 

  1191. 

  1192. <P><STRONG><a name="[e0]"></a>HAL_UART_Receive_DMA</STRONG> (Thumb, 66 bytes, Stack size 16 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_Receive_DMA))
    1193. 

  1193. <BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1194. 

  1194. </UL>
    1195. 

  1195. <BR>[Calls]<UL><LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Start_Receive_DMA
    1196. 

  1196. </UL>
    1197. 

  1197. <BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Recive_Handle_Usart1
    1198. 

  1198. <LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART3_UART_Init
    1199. 

  1199. <LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
    1200. 

  1200. </UL>
    1201. 

  1201. 

  1202. <P><STRONG><a name="[10b]"></a>HAL_UART_RxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_RxCpltCallback))
    1203. 

  1203. <BR><BR>[Called By]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Receive_IT
    1204. 

  1204. <LI><a href="#[64]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAReceiveCplt
    1205. 

  1205. </UL>
    1206. 

  1206. 

  1207. <P><STRONG><a name="[10c]"></a>HAL_UART_RxHalfCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_RxHalfCpltCallback))
    1208. 

  1208. <BR><BR>[Called By]<UL><LI><a href="#[65]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMARxHalfCplt
    1209. 

  1209. </UL>
    1210. 

  1210. 

  1211. <P><STRONG><a name="[10d]"></a>HAL_UART_TxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.HAL_UART_TxCpltCallback))
    1212. 

  1212. <BR><BR>[Called By]<UL><LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTransmit_IT
    1213. 

  1213. </UL>
    1214. 

  1214. 

  1215. <P><STRONG><a name="[3]"></a>HardFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.HardFault_Handler))
    1216. 

  1216. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1217. 

  1217. </UL>
    1218. 

  1218. <P><STRONG><a name="[e2]"></a>MX_CAN_Init</STRONG> (Thumb, 300 bytes, Stack size 16 bytes, can.o(i.MX_CAN_Init))
    1219. 

  1219. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = MX_CAN_Init &rArr; HAL_CAN_Init &rArr; HAL_CAN_MspInit &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1220. 

  1220. </UL>
    1221. 

  1221. <BR>[Calls]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_Init
    1222. 

  1222. <LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;CAN_ConfigFilter
    1223. 

  1223. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1224. 

  1224. </UL>
    1225. 

  1225. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1226. 

  1226. </UL>
    1227. 

  1227. 

  1228. <P><STRONG><a name="[e3]"></a>MX_DMA_Init</STRONG> (Thumb, 98 bytes, Stack size 8 bytes, dma.o(i.MX_DMA_Init))
    1229. 

  1229. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = MX_DMA_Init &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1230. 

  1230. </UL>
    1231. 

  1231. <BR>[Calls]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    1232. 

  1232. <LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
    1233. 

  1233. </UL>
    1234. 

  1234. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1235. 

  1235. </UL>
    1236. 

  1236. 

  1237. <P><STRONG><a name="[e4]"></a>MX_FREERTOS_Init</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, freertos.o(i.MX_FREERTOS_Init))
    1238. 

  1238. <BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = MX_FREERTOS_Init &rArr; osTimerNew &rArr; xTimerCreateStatic &rArr; prvInitialiseNewTimer &rArr; prvCheckForValidListAndQueue &rArr; xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    1239. 

  1239. </UL>
    1240. 

  1240. <BR>[Calls]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerNew
    1241. 

  1241. <LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osThreadNew
    1242. 

  1242. </UL>
    1243. 

  1243. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1244. 

  1244. </UL>
    1245. 

  1245. 

  1246. <P><STRONG><a name="[e7]"></a>MX_GPIO_Init</STRONG> (Thumb, 266 bytes, Stack size 32 bytes, gpio.o(i.MX_GPIO_Init))
    1247. 

  1247. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
    1248. 

  1248. </UL>
    1249. 

  1249. <BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
    1250. 

  1250. <LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
    1251. 

  1251. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1252. 

  1252. </UL>
    1253. 

  1253. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1254. 

  1254. </UL>
    1255. 

  1255. 

  1256. <P><STRONG><a name="[e9]"></a>MX_TIM3_Init</STRONG> (Thumb, 112 bytes, Stack size 40 bytes, tim.o(i.MX_TIM3_Init))
    1257. 

  1257. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = MX_TIM3_Init &rArr; HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1258. 

  1258. </UL>
    1259. 

  1259. <BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1260. 

  1260. <LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1261. 

  1261. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1262. 

  1262. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1263. 

  1263. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1264. 

  1264. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1265. 

  1265. </UL>
    1266. 

  1266. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1267. 

  1267. </UL>
    1268. 

  1268. 

  1269. <P><STRONG><a name="[eb]"></a>MX_TIM4_Init</STRONG> (Thumb, 200 bytes, Stack size 56 bytes, tim.o(i.MX_TIM4_Init))
    1270. 

  1270. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = MX_TIM4_Init &rArr; HAL_TIM_MspPostInit &rArr; HAL_GPIO_Init
    1271. 

  1271. </UL>
    1272. 

  1272. <BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1273. 

  1273. <LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1274. 

  1274. <LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    1275. 

  1275. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    1276. 

  1276. <LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIMEx_MasterConfigSynchronization
    1277. 

  1277. <LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_MspPostInit
    1278. 

  1278. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1279. 

  1279. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1280. 

  1280. </UL>
    1281. 

  1281. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1282. 

  1282. </UL>
    1283. 

  1283. 

  1284. <P><STRONG><a name="[ec]"></a>MX_USART1_UART_Init</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, usart.o(i.MX_USART1_UART_Init))
    1285. 

  1285. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = MX_USART1_UART_Init &rArr; HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1286. 

  1286. </UL>
    1287. 

  1287. <BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
    1288. 

  1288. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1289. 

  1289. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1290. 

  1290. </UL>
    1291. 

  1291. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1292. 

  1292. </UL>
    1293. 

  1293. 

  1294. <P><STRONG><a name="[ed]"></a>MX_USART3_UART_Init</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, usart.o(i.MX_USART3_UART_Init))
    1295. 

  1295. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = MX_USART3_UART_Init &rArr; HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1296. 

  1296. </UL>
    1297. 

  1297. <BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
    1298. 

  1298. <LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    1299. 

  1299. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1300. 

  1300. </UL>
    1301. 

  1301. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1302. 

  1302. </UL>
    1303. 

  1303. 

  1304. <P><STRONG><a name="[4]"></a>MemManage_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.MemManage_Handler))
    1305. 

  1305. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1306. 

  1306. </UL>
    1307. 

  1307. <P><STRONG><a name="[2]"></a>NMI_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.NMI_Handler))
    1308. 

  1308. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1309. 

  1309. </UL>
    1310. 

  1310. <P><STRONG><a name="[ee]"></a>PWM_Send_Tim</STRONG> (Thumb, 328 bytes, Stack size 8 bytes, bsp.o(i.PWM_Send_Tim))
    1311. 

  1311. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = PWM_Send_Tim &rArr; Tim_PWM
    1312. 

  1312. </UL>
    1313. 

  1313. <BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskGetTickCount
    1314. 

  1314. <LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Tim_PWM
    1315. 

  1315. </UL>
    1316. 

  1316. <BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Can_Handle
    1317. 

  1317. </UL>
    1318. 

  1318. 

  1319. <P><STRONG><a name="[f1]"></a>Recive_Handle_Usart1</STRONG> (Thumb, 120 bytes, Stack size 8 bytes, bsp.o(i.Recive_Handle_Usart1))
    1320. 

  1320. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = Recive_Handle_Usart1 &rArr; HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1321. 

  1321. </UL>
    1322. 

  1322. <BR>[Calls]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
    1323. 

  1323. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sbus_loopdead
    1324. 

  1324. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    1325. 

  1325. </UL>
    1326. 

  1326. <BR>[Called By]<UL><LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task02
    1327. 

  1327. </UL>
    1328. 

  1328. 

  1329. <P><STRONG><a name="[f3]"></a>SEGGER_RTT_Init</STRONG> (Thumb, 8 bytes, Stack size 8 bytes, segger_rtt.o(i.SEGGER_RTT_Init))
    1330. 

  1330. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = SEGGER_RTT_Init &rArr; _DoInit
    1331. 

  1331. </UL>
    1332. 

  1332. <BR>[Calls]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_DoInit
    1333. 

  1333. </UL>
    1334. 

  1334. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1335. 

  1335. </UL>
    1336. 

  1336. 

  1337. <P><STRONG><a name="[f5]"></a>SEGGER_RTT_Write</STRONG> (Thumb, 70 bytes, Stack size 24 bytes, segger_rtt.o(i.SEGGER_RTT_Write))
    1338. 

  1338. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    1339. 

  1339. </UL>
    1340. 

  1340. <BR>[Calls]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_WriteNoLock
    1341. 

  1341. <LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_DoInit
    1342. 

  1342. </UL>
    1343. 

  1343. <BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_vprintf
    1344. 

  1344. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_StoreChar
    1345. 

  1345. </UL>
    1346. 

  1346. 

  1347. <P><STRONG><a name="[f6]"></a>SEGGER_RTT_WriteNoLock</STRONG> (Thumb, 126 bytes, Stack size 32 bytes, segger_rtt.o(i.SEGGER_RTT_WriteNoLock))
    1348. 

  1348. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    1349. 

  1349. </UL>
    1350. 

  1350. <BR>[Calls]<UL><LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_WriteNoCheck
    1351. 

  1351. <LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_WriteBlocking
    1352. 

  1352. <LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_GetAvailWriteSpace
    1353. 

  1353. </UL>
    1354. 

  1354. <BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_Write
    1355. 

  1355. </UL>
    1356. 

  1356. 

  1357. <P><STRONG><a name="[fa]"></a>SEGGER_RTT_printf</STRONG> (Thumb, 34 bytes, Stack size 32 bytes, segger_rtt_printf.o(i.SEGGER_RTT_printf))
    1358. 

  1358. <BR><BR>[Stack]<UL><LI>Max Depth = 456<LI>Call Chain = SEGGER_RTT_printf &rArr; SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    1359. 

  1359. </UL>
    1360. 

  1360. <BR>[Calls]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_vprintf
    1361. 

  1361. </UL>
    1362. 

  1362. <BR>[Called By]<UL><LI><a href="#[8a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;can_send_msg
    1363. 

  1363. </UL>
    1364. 

  1364. 

  1365. <P><STRONG><a name="[fb]"></a>SEGGER_RTT_vprintf</STRONG> (Thumb, 626 bytes, Stack size 152 bytes, segger_rtt_printf.o(i.SEGGER_RTT_vprintf))
    1366. 

  1366. <BR><BR>[Stack]<UL><LI>Max Depth = 424<LI>Call Chain = SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    1367. 

  1367. </UL>
    1368. 

  1368. <BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_StoreChar
    1369. 

  1369. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintUnsigned
    1370. 

  1370. <LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintInt
    1371. 

  1371. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    1372. 

  1372. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_Write
    1373. 

  1373. </UL>
    1374. 

  1374. <BR>[Called By]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_printf
    1375. 

  1375. </UL>
    1376. 

  1376. 

  1377. <P><STRONG><a name="[100]"></a>Sbus_Can_Handle</STRONG> (Thumb, 276 bytes, Stack size 8 bytes, bsp.o(i.Sbus_Can_Handle))
    1378. 

  1378. <BR><BR>[Stack]<UL><LI>Max Depth = 568<LI>Call Chain = Sbus_Can_Handle &rArr; Can_Drive_Send &rArr; can_send_msg &rArr; SEGGER_RTT_printf &rArr; SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    1379. 

  1379. </UL>
    1380. 

  1380. <BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Motion_Re
    1381. 

  1381. <LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Drive_Stop
    1382. 

  1382. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Drive_Send
    1383. 

  1383. <LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PWM_Send_Tim
    1384. 

  1384. <LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Remote_re_con
    1385. 

  1385. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    1386. 

  1386. </UL>
    1387. 

  1387. <BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task03
    1388. 

  1388. </UL>
    1389. 

  1389. 

  1390. <P><STRONG><a name="[102]"></a>Sbus_Motion_Re</STRONG> (Thumb, 1536 bytes, Stack size 40 bytes, motion_model.o(i.Sbus_Motion_Re))
    1391. 

  1391. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = Sbus_Motion_Re &rArr; __aeabi_dmul &rArr; _double_epilogue &rArr; _double_round
    1392. 

  1392. </UL>
    1393. 

  1393. <BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    1394. 

  1394. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    1395. 

  1395. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
    1396. 

  1396. <LI><a href="#[71]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
    1397. 

  1397. </UL>
    1398. 

  1398. <BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Can_Handle
    1399. 

  1399. </UL>
    1400. 

  1400. 

  1401. <P><STRONG><a name="[61]"></a>StartDefaultTask</STRONG> (Thumb, 58 bytes, Stack size 0 bytes, freertos.o(i.StartDefaultTask))
    1402. 

  1402. <BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = StartDefaultTask &rArr; osTimerStart &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    1403. 

  1403. </UL>
    1404. 

  1404. <BR>[Calls]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerStart
    1405. 

  1405. <LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
    1406. 

  1406. <LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IWDG_Refresh
    1407. 

  1407. <LI><a href="#[7f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_TogglePin
    1408. 

  1408. </UL>
    1409. 

  1409. <BR>[Address Reference Count : 1]<UL><LI> freertos.o(i.MX_FREERTOS_Init)
    1410. 

  1410. </UL>
    1411. 

  1411. <P><STRONG><a name="[a]"></a>SysTick_Handler</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, cmsis_os2.o(i.SysTick_Handler))
    1412. 

  1412. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = SysTick_Handler &rArr; xPortSysTickHandler &rArr; xTaskIncrementTick
    1413. 

  1413. </UL>
    1414. 

  1414. <BR>[Calls]<UL><LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskGetSchedulerState
    1415. 

  1415. <LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortSysTickHandler
    1416. 

  1416. </UL>
    1417. 

  1417. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1418. 

  1418. </UL>
    1419. 

  1419. <P><STRONG><a name="[108]"></a>SystemClock_Config</STRONG> (Thumb, 176 bytes, Stack size 80 bytes, main.o(i.SystemClock_Config))
    1420. 

  1420. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority &rArr; __NVIC_SetPriority
    1421. 

  1421. </UL>
    1422. 

  1422. <BR>[Calls]<UL><LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
    1423. 

  1423. <LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
    1424. 

  1424. <LI><a href="#[84]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
    1425. 

  1425. <LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    1426. 

  1426. </UL>
    1427. 

  1427. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1428. 

  1428. </UL>
    1429. 

  1429. 

  1430. <P><STRONG><a name="[5d]"></a>SystemInit</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, system_stm32f4xx.o(i.SystemInit))
    1431. 

  1431. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(.text)
    1432. 

  1432. </UL>
    1433. 

  1433. <P><STRONG><a name="[41]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 10 bytes, Stack size 8 bytes, stm32f4xx_it.o(i.TIM6_DAC_IRQHandler))
    1434. 

  1434. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = TIM6_DAC_IRQHandler &rArr; HAL_TIM_IRQHandler &rArr; HAL_TIM_PeriodElapsedCallback
    1435. 

  1435. </UL>
    1436. 

  1436. <BR>[Calls]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_IRQHandler
    1437. 

  1437. </UL>
    1438. 

  1438. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1439. 

  1439. </UL>
    1440. 

  1440. <P><STRONG><a name="[b9]"></a>TIM_Base_SetConfig</STRONG> (Thumb, 170 bytes, Stack size 8 bytes, stm32f4xx_hal_tim.o(i.TIM_Base_SetConfig))
    1441. 

  1441. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = TIM_Base_SetConfig
    1442. 

  1442. </UL>
    1443. 

  1443. <BR>[Called By]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Init
    1444. 

  1444. <LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Base_Init
    1445. 

  1445. </UL>
    1446. 

  1446. 

  1447. <P><STRONG><a name="[d0]"></a>TIM_CCxChannelCmd</STRONG> (Thumb, 34 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_CCxChannelCmd))
    1448. 

  1448. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_CCxChannelCmd
    1449. 

  1449. </UL>
    1450. 

  1450. <BR>[Called By]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_Start
    1451. 

  1451. </UL>
    1452. 

  1452. 

  1453. <P><STRONG><a name="[bb]"></a>TIM_ETR_SetConfig</STRONG> (Thumb, 22 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_ETR_SetConfig))
    1454. 

  1454. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_ETR_SetConfig
    1455. 

  1455. </UL>
    1456. 

  1456. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    1457. 

  1457. </UL>
    1458. 

  1458. 

  1459. <P><STRONG><a name="[ca]"></a>TIM_OC2_SetConfig</STRONG> (Thumb, 114 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_OC2_SetConfig))
    1460. 

  1460. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC2_SetConfig
    1461. 

  1461. </UL>
    1462. 

  1462. <BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    1463. 

  1463. </UL>
    1464. 

  1464. 

  1465. <P><STRONG><a name="[62]"></a>Task02</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, freertos.o(i.Task02))
    1466. 

  1466. <BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = Task02 &rArr; Recive_Handle_Usart1 &rArr; HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1467. 

  1467. </UL>
    1468. 

  1468. <BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxTaskGetStackHighWaterMark
    1469. 

  1469. <LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
    1470. 

  1470. <LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Recive_Handle_Usart1
    1471. 

  1471. </UL>
    1472. 

  1472. <BR>[Address Reference Count : 1]<UL><LI> freertos.o(i.MX_FREERTOS_Init)
    1473. 

  1473. </UL>
    1474. 

  1474. <P><STRONG><a name="[63]"></a>Task03</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, freertos.o(i.Task03))
    1475. 

  1475. <BR><BR>[Stack]<UL><LI>Max Depth = 568<LI>Call Chain = Task03 &rArr; Sbus_Can_Handle &rArr; Can_Drive_Send &rArr; can_send_msg &rArr; SEGGER_RTT_printf &rArr; SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    1476. 

  1476. </UL>
    1477. 

  1477. <BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxTaskGetStackHighWaterMark
    1478. 

  1478. <LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
    1479. 

  1479. <LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Can_Handle
    1480. 

  1480. </UL>
    1481. 

  1481. <BR>[Address Reference Count : 1]<UL><LI> freertos.o(i.MX_FREERTOS_Init)
    1482. 

  1482. </UL>
    1483. 

  1483. <P><STRONG><a name="[ef]"></a>Tim_PWM</STRONG> (Thumb, 98 bytes, Stack size 16 bytes, pwm.o(i.Tim_PWM))
    1484. 

  1484. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = Tim_PWM
    1485. 

  1485. </UL>
    1486. 

  1486. <BR>[Called By]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PWM_Send_Tim
    1487. 

  1487. </UL>
    1488. 

  1488. 

  1489. <P><STRONG><a name="[e1]"></a>UART_Start_Receive_DMA</STRONG> (Thumb, 196 bytes, Stack size 32 bytes, stm32f4xx_hal_uart.o(i.UART_Start_Receive_DMA))
    1490. 

  1490. <BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
    1491. 

  1491. </UL>
    1492. 

  1492. <BR>[Calls]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
    1493. 

  1493. </UL>
    1494. 

  1494. <BR>[Called By]<UL><LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
    1495. 

  1495. </UL>
    1496. 

  1496. 

  1497. <P><STRONG><a name="[30]"></a>USART1_IRQHandler</STRONG> (Thumb, 76 bytes, Stack size 16 bytes, stm32f4xx_it.o(i.USART1_IRQHandler))
    1498. 

  1498. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = USART1_IRQHandler &rArr; HAL_UART_IRQHandler &rArr; UART_Receive_IT
    1499. 

  1499. </UL>
    1500. 

  1500. <BR>[Calls]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    1501. 

  1501. <LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
    1502. 

  1502. </UL>
    1503. 

  1503. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1504. 

  1504. </UL>
    1505. 

  1505. <P><STRONG><a name="[32]"></a>USART3_IRQHandler</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, stm32f4xx_it.o(i.USART3_IRQHandler))
    1506. 

  1506. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = USART3_IRQHandler &rArr; HAL_UART_IRQHandler &rArr; UART_Receive_IT
    1507. 

  1507. </UL>
    1508. 

  1508. <BR>[Calls]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    1509. 

  1509. <LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
    1510. 

  1510. </UL>
    1511. 

  1511. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1512. 

  1512. </UL>
    1513. 

  1513. <P><STRONG><a name="[6]"></a>UsageFault_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32f4xx_it.o(i.UsageFault_Handler))
    1514. 

  1514. <BR>[Address Reference Count : 1]<UL><LI> startup_stm32f407xx.o(RESET)
    1515. 

  1515. </UL>
    1516. 

  1516. <P><STRONG><a name="[16b]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)
    1517. 

  1517. 

  1518. <P><STRONG><a name="[16c]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)
    1519. 

  1519. 

  1520. <P><STRONG><a name="[16d]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)
    1521. 

  1521. 

  1522. <P><STRONG><a name="[8a]"></a>can_send_msg</STRONG> (Thumb, 170 bytes, Stack size 64 bytes, can.o(i.can_send_msg))
    1523. 

  1523. <BR><BR>[Stack]<UL><LI>Max Depth = 520<LI>Call Chain = can_send_msg &rArr; SEGGER_RTT_printf &rArr; SEGGER_RTT_vprintf &rArr; _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    1524. 

  1524. </UL>
    1525. 

  1525. <BR>[Calls]<UL><LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_printf
    1526. 

  1526. <LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_GetTxMailboxesFreeLevel
    1527. 

  1527. <LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_CAN_AddTxMessage
    1528. 

  1528. </UL>
    1529. 

  1529. <BR>[Called By]<UL><LI><a href="#[8b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Drive_Stop
    1530. 

  1530. <LI><a href="#[89]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Can_Drive_Send
    1531. 

  1531. </UL>
    1532. 

  1532. 

  1533. <P><STRONG><a name="[5c]"></a>main</STRONG> (Thumb, 68 bytes, Stack size 0 bytes, main.o(i.main))
    1534. 

  1534. <BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = main &rArr; MX_FREERTOS_Init &rArr; osTimerNew &rArr; xTimerCreateStatic &rArr; prvInitialiseNewTimer &rArr; prvCheckForValidListAndQueue &rArr; xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    1535. 

  1535. </UL>
    1536. 

  1536. <BR>[Calls]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osKernelStart
    1537. 

  1537. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osKernelInitialize
    1538. 

  1538. <LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_Init
    1539. 

  1539. <LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART3_UART_Init
    1540. 

  1540. <LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_USART1_UART_Init
    1541. 

  1541. <LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM4_Init
    1542. 

  1542. <LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_TIM3_Init
    1543. 

  1543. <LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
    1544. 

  1544. <LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FREERTOS_Init
    1545. 

  1545. <LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
    1546. 

  1546. <LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_CAN_Init
    1547. 

  1547. <LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_Start
    1548. 

  1548. <LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
    1549. 

  1549. <LI><a href="#[7e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BEED_DiDi
    1550. 

  1550. <LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
    1551. 

  1551. </UL>
    1552. 

  1552. <BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
    1553. 

  1553. </UL>
    1554. 

  1554. <P><STRONG><a name="[105]"></a>osDelay</STRONG> (Thumb, 30 bytes, Stack size 16 bytes, cmsis_os2.o(i.osDelay))
    1555. 

  1555. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = osDelay &rArr; vTaskDelay &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    1556. 

  1556. </UL>
    1557. 

  1557. <BR>[Calls]<UL><LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
    1558. 

  1558. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__get_IPSR
    1559. 

  1559. </UL>
    1560. 

  1560. <BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task03
    1561. 

  1561. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task02
    1562. 

  1562. <LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
    1563. 

  1563. </UL>
    1564. 

  1564. 

  1565. <P><STRONG><a name="[112]"></a>osKernelInitialize</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, cmsis_os2.o(i.osKernelInitialize))
    1566. 

  1566. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = osKernelInitialize
    1567. 

  1567. </UL>
    1568. 

  1568. <BR>[Calls]<UL><LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__get_IPSR
    1569. 

  1569. </UL>
    1570. 

  1570. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1571. 

  1571. </UL>
    1572. 

  1572. 

  1573. <P><STRONG><a name="[113]"></a>osKernelStart</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, cmsis_os2.o(i.osKernelStart))
    1574. 

  1574. <BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = osKernelStart &rArr; vTaskStartScheduler &rArr; xTimerCreateTimerTask &rArr; xTaskCreateStatic &rArr; prvInitialiseNewTask
    1575. 

  1575. </UL>
    1576. 

  1576. <BR>[Calls]<UL><LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
    1577. 

  1577. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__get_IPSR
    1578. 

  1578. </UL>
    1579. 

  1579. <BR>[Called By]<UL><LI><a href="#[5c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
    1580. 

  1580. </UL>
    1581. 

  1581. 

  1582. <P><STRONG><a name="[e6]"></a>osThreadNew</STRONG> (Thumb, 186 bytes, Stack size 48 bytes, cmsis_os2.o(i.osThreadNew))
    1583. 

  1583. <BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = osThreadNew &rArr; xTaskCreate &rArr; pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    1584. 

  1584. </UL>
    1585. 

  1585. <BR>[Calls]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreateStatic
    1586. 

  1586. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
    1587. 

  1587. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__get_IPSR
    1588. 

  1588. </UL>
    1589. 

  1589. <BR>[Called By]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FREERTOS_Init
    1590. 

  1590. </UL>
    1591. 

  1591. 

  1592. <P><STRONG><a name="[e5]"></a>osTimerNew</STRONG> (Thumb, 182 bytes, Stack size 48 bytes, cmsis_os2.o(i.osTimerNew))
    1593. 

  1593. <BR><BR>[Stack]<UL><LI>Max Depth = 216<LI>Call Chain = osTimerNew &rArr; xTimerCreateStatic &rArr; prvInitialiseNewTimer &rArr; prvCheckForValidListAndQueue &rArr; xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    1594. 

  1594. </UL>
    1595. 

  1595. <BR>[Calls]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
    1596. 

  1596. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
    1597. 

  1597. <LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__get_IPSR
    1598. 

  1598. <LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreateStatic
    1599. 

  1599. <LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreate
    1600. 

  1600. </UL>
    1601. 

  1601. <BR>[Called By]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_FREERTOS_Init
    1602. 

  1602. </UL>
    1603. 

  1603. 

  1604. <P><STRONG><a name="[103]"></a>osTimerStart</STRONG> (Thumb, 60 bytes, Stack size 24 bytes, cmsis_os2.o(i.osTimerStart))
    1605. 

  1605. <BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = osTimerStart &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    1606. 

  1606. </UL>
    1607. 

  1607. <BR>[Calls]<UL><LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__get_IPSR
    1608. 

  1608. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerGenericCommand
    1609. 

  1609. </UL>
    1610. 

  1610. <BR>[Called By]<UL><LI><a href="#[61]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;StartDefaultTask
    1611. 

  1611. </UL>
    1612. 

  1612. 

  1613. <P><STRONG><a name="[119]"></a>pvPortMalloc</STRONG> (Thumb, 306 bytes, Stack size 24 bytes, heap_4.o(i.pvPortMalloc))
    1614. 

  1614. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    1615. 

  1615. </UL>
    1616. 

  1616. <BR>[Calls]<UL><LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1617. 

  1617. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
    1618. 

  1618. <LI><a href="#[146]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInsertBlockIntoFreeList
    1619. 

  1619. <LI><a href="#[145]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvHeapInit
    1620. 

  1620. </UL>
    1621. 

  1621. <BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerNew
    1622. 

  1622. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
    1623. 

  1623. <LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreate
    1624. 

  1624. </UL>
    1625. 

  1625. 

  1626. <P><STRONG><a name="[10a]"></a>pvTimerGetTimerID</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, timers.o(i.pvTimerGetTimerID))
    1627. 

  1627. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = pvTimerGetTimerID
    1628. 

  1628. </UL>
    1629. 

  1629. <BR>[Calls]<UL><LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    1630. 

  1630. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    1631. 

  1631. </UL>
    1632. 

  1632. <BR>[Called By]<UL><LI><a href="#[67]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;TimerCallback
    1633. 

  1633. </UL>
    1634. 

  1634. 

  1635. <P><STRONG><a name="[133]"></a>pxPortInitialiseStack</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, port.o(i.pxPortInitialiseStack))
    1636. 

  1636. <BR><BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
    1637. 

  1637. </UL>
    1638. 

  1638. 

  1639. <P><STRONG><a name="[f2]"></a>sbus_loopdead</STRONG> (Thumb, 166 bytes, Stack size 8 bytes, bsp.o(i.sbus_loopdead))
    1640. 

  1640. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = sbus_loopdead
    1641. 

  1641. </UL>
    1642. 

  1642. <BR>[Calls]<UL><LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;update_sbus
    1643. 

  1643. <LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Remote_re_con
    1644. 

  1644. </UL>
    1645. 

  1645. <BR>[Called By]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Recive_Handle_Usart1
    1646. 

  1646. </UL>
    1647. 

  1647. 

  1648. <P><STRONG><a name="[11f]"></a>uxListRemove</STRONG> (Thumb, 40 bytes, Stack size 0 bytes, list.o(i.uxListRemove))
    1649. 

  1649. <BR><BR>[Called By]<UL><LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
    1650. 

  1650. <LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckTasksWaitingTermination
    1651. 

  1651. <LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
    1652. 

  1652. <LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskRemoveFromEventList
    1653. 

  1653. <LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskPriorityDisinherit
    1654. 

  1654. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1655. 

  1655. <LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSwitchTimerLists
    1656. 

  1656. <LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessReceivedCommands
    1657. 

  1657. <LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessExpiredTimer
    1658. 

  1658. </UL>
    1659. 

  1659. 

  1660. <P><STRONG><a name="[109]"></a>uxTaskGetStackHighWaterMark</STRONG> (Thumb, 34 bytes, Stack size 24 bytes, tasks.o(i.uxTaskGetStackHighWaterMark))
    1661. 

  1661. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = uxTaskGetStackHighWaterMark
    1662. 

  1662. </UL>
    1663. 

  1663. <BR>[Calls]<UL><LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvTaskCheckFreeStackSpace
    1664. 

  1664. </UL>
    1665. 

  1665. <BR>[Called By]<UL><LI><a href="#[63]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task03
    1666. 

  1666. <LI><a href="#[62]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Task02
    1667. 

  1667. </UL>
    1668. 

  1668. 

  1669. <P><STRONG><a name="[14d]"></a>vApplicationGetIdleTaskMemory</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, cmsis_os2.o(i.vApplicationGetIdleTaskMemory))
    1670. 

  1670. <BR><BR>[Called By]<UL><LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
    1671. 

  1671. </UL>
    1672. 

  1672. 

  1673. <P><STRONG><a name="[159]"></a>vApplicationGetTimerTaskMemory</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, cmsis_os2.o(i.vApplicationGetTimerTaskMemory))
    1674. 

  1674. <BR><BR>[Called By]<UL><LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreateTimerTask
    1675. 

  1675. </UL>
    1676. 

  1676. 

  1677. <P><STRONG><a name="[127]"></a>vListInitialise</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, list.o(i.vListInitialise))
    1678. 

  1678. <BR><BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseTaskLists
    1679. 

  1679. <LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericReset
    1680. 

  1680. <LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckForValidListAndQueue
    1681. 

  1681. </UL>
    1682. 

  1682. 

  1683. <P><STRONG><a name="[132]"></a>vListInitialiseItem</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, list.o(i.vListInitialiseItem))
    1684. 

  1684. <BR><BR>[Called By]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
    1685. 

  1685. <LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTimer
    1686. 

  1686. </UL>
    1687. 

  1687. 

  1688. <P><STRONG><a name="[121]"></a>vListInsert</STRONG> (Thumb, 52 bytes, Stack size 8 bytes, list.o(i.vListInsert))
    1689. 

  1689. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = vListInsert
    1690. 

  1690. </UL>
    1691. 

  1691. <BR>[Called By]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
    1692. 

  1692. <LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskPlaceOnEventList
    1693. 

  1693. <LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSwitchTimerLists
    1694. 

  1694. <LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInsertTimerInActiveList
    1695. 

  1695. </UL>
    1696. 

  1696. 

  1697. <P><STRONG><a name="[120]"></a>vListInsertEnd</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, list.o(i.vListInsertEnd))
    1698. 

  1698. <BR><BR>[Called By]<UL><LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
    1699. 

  1699. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
    1700. 

  1700. <LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
    1701. 

  1701. <LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskRemoveFromEventList
    1702. 

  1702. <LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskPriorityDisinherit
    1703. 

  1703. <LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskPlaceOnEventListRestricted
    1704. 

  1704. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1705. 

  1705. </UL>
    1706. 

  1706. 

  1707. <P><STRONG><a name="[123]"></a>vPortEnterCritical</STRONG> (Thumb, 76 bytes, Stack size 0 bytes, port.o(i.vPortEnterCritical))
    1708. 

  1708. <BR><BR>[Called By]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckTasksWaitingTermination
    1709. 

  1709. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
    1710. 

  1710. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCheckForTimeOut
    1711. 

  1711. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    1712. 

  1712. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    1713. 

  1713. <LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericReset
    1714. 

  1714. <LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vQueueWaitForMessageRestricted
    1715. 

  1715. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvUnlockQueue
    1716. 

  1716. <LI><a href="#[137]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIsQueueFull
    1717. 

  1717. <LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIsQueueEmpty
    1718. 

  1718. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1719. 

  1719. <LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvTimerGetTimerID
    1720. 

  1720. <LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckForValidListAndQueue
    1721. 

  1721. </UL>
    1722. 

  1722. 

  1723. <P><STRONG><a name="[125]"></a>vPortExitCritical</STRONG> (Thumb, 56 bytes, Stack size 0 bytes, port.o(i.vPortExitCritical))
    1724. 

  1724. <BR><BR>[Called By]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckTasksWaitingTermination
    1725. 

  1725. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
    1726. 

  1726. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCheckForTimeOut
    1727. 

  1727. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    1728. 

  1728. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    1729. 

  1729. <LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericReset
    1730. 

  1730. <LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vQueueWaitForMessageRestricted
    1731. 

  1731. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvUnlockQueue
    1732. 

  1732. <LI><a href="#[137]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIsQueueFull
    1733. 

  1733. <LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIsQueueEmpty
    1734. 

  1734. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1735. 

  1735. <LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvTimerGetTimerID
    1736. 

  1736. <LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckForValidListAndQueue
    1737. 

  1737. </UL>
    1738. 

  1738. 

  1739. <P><STRONG><a name="[11c]"></a>vPortFree</STRONG> (Thumb, 150 bytes, Stack size 16 bytes, heap_4.o(i.vPortFree))
    1740. 

  1740. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = vPortFree &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    1741. 

  1741. </UL>
    1742. 

  1742. <BR>[Calls]<UL><LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1743. 

  1743. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
    1744. 

  1744. <LI><a href="#[146]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInsertBlockIntoFreeList
    1745. 

  1745. </UL>
    1746. 

  1746. <BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerNew
    1747. 

  1747. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
    1748. 

  1748. <LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvDeleteTCB
    1749. 

  1749. <LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessReceivedCommands
    1750. 

  1750. </UL>
    1751. 

  1751. 

  1752. <P><STRONG><a name="[150]"></a>vPortSetupTimerInterrupt</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, port.o(i.vPortSetupTimerInterrupt))
    1753. 

  1753. <BR><BR>[Called By]<UL><LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
    1754. 

  1754. </UL>
    1755. 

  1755. 

  1756. <P><STRONG><a name="[149]"></a>vPortValidateInterruptPriority</STRONG> (Thumb, 106 bytes, Stack size 16 bytes, port.o(i.vPortValidateInterruptPriority))
    1757. 

  1757. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = vPortValidateInterruptPriority
    1758. 

  1758. </UL>
    1759. 

  1759. <BR>[Calls]<UL><LI><a href="#[14a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortGetIPSR
    1760. 

  1760. </UL>
    1761. 

  1761. <BR>[Called By]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSendFromISR
    1762. 

  1762. </UL>
    1763. 

  1763. 

  1764. <P><STRONG><a name="[129]"></a>vQueueAddToRegistry</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, queue.o(i.vQueueAddToRegistry))
    1765. 

  1765. <BR><BR>[Called By]<UL><LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckForValidListAndQueue
    1766. 

  1766. </UL>
    1767. 

  1767. 

  1768. <P><STRONG><a name="[13f]"></a>vQueueWaitForMessageRestricted</STRONG> (Thumb, 74 bytes, Stack size 24 bytes, queue.o(i.vQueueWaitForMessageRestricted))
    1769. 

  1769. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = vQueueWaitForMessageRestricted &rArr; vTaskPlaceOnEventListRestricted &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    1770. 

  1770. </UL>
    1771. 

  1771. <BR>[Calls]<UL><LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskPlaceOnEventListRestricted
    1772. 

  1772. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvUnlockQueue
    1773. 

  1773. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    1774. 

  1774. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    1775. 

  1775. </UL>
    1776. 

  1776. <BR>[Called By]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessTimerOrBlockTask
    1777. 

  1777. </UL>
    1778. 

  1778. 

  1779. <P><STRONG><a name="[115]"></a>vTaskDelay</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, tasks.o(i.vTaskDelay))
    1780. 

  1780. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = vTaskDelay &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    1781. 

  1781. </UL>
    1782. 

  1782. <BR>[Calls]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
    1783. 

  1783. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1784. 

  1784. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
    1785. 

  1785. </UL>
    1786. 

  1786. <BR>[Called By]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
    1787. 

  1787. </UL>
    1788. 

  1788. 

  1789. <P><STRONG><a name="[155]"></a>vTaskInternalSetTimeOutState</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, tasks.o(i.vTaskInternalSetTimeOutState))
    1790. 

  1790. <BR><BR>[Called By]<UL><LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCheckForTimeOut
    1791. 

  1791. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    1792. 

  1792. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    1793. 

  1793. </UL>
    1794. 

  1794. 

  1795. <P><STRONG><a name="[144]"></a>vTaskMissedYield</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, tasks.o(i.vTaskMissedYield))
    1796. 

  1796. <BR><BR>[Called By]<UL><LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvUnlockQueue
    1797. 

  1797. </UL>
    1798. 

  1798. 

  1799. <P><STRONG><a name="[14c]"></a>vTaskPlaceOnEventList</STRONG> (Thumb, 52 bytes, Stack size 16 bytes, tasks.o(i.vTaskPlaceOnEventList))
    1800. 

  1800. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    1801. 

  1801. </UL>
    1802. 

  1802. <BR>[Calls]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
    1803. 

  1803. <LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsert
    1804. 

  1804. </UL>
    1805. 

  1805. <BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    1806. 

  1806. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    1807. 

  1807. </UL>
    1808. 

  1808. 

  1809. <P><STRONG><a name="[14b]"></a>vTaskPlaceOnEventListRestricted</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, tasks.o(i.vTaskPlaceOnEventListRestricted))
    1810. 

  1810. <BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = vTaskPlaceOnEventListRestricted &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    1811. 

  1811. </UL>
    1812. 

  1812. <BR>[Calls]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddCurrentTaskToDelayedList
    1813. 

  1813. <LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
    1814. 

  1814. </UL>
    1815. 

  1815. <BR>[Called By]<UL><LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vQueueWaitForMessageRestricted
    1816. 

  1816. </UL>
    1817. 

  1817. 

  1818. <P><STRONG><a name="[116]"></a>vTaskStartScheduler</STRONG> (Thumb, 156 bytes, Stack size 32 bytes, tasks.o(i.vTaskStartScheduler))
    1819. 

  1819. <BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = vTaskStartScheduler &rArr; xTimerCreateTimerTask &rArr; xTaskCreateStatic &rArr; prvInitialiseNewTask
    1820. 

  1820. </UL>
    1821. 

  1821. <BR>[Calls]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreateStatic
    1822. 

  1822. <LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreateTimerTask
    1823. 

  1823. <LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortStartScheduler
    1824. 

  1824. <LI><a href="#[14d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vApplicationGetIdleTaskMemory
    1825. 

  1825. </UL>
    1826. 

  1826. <BR>[Called By]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osKernelStart
    1827. 

  1827. </UL>
    1828. 

  1828. 

  1829. <P><STRONG><a name="[13d]"></a>vTaskSuspendAll</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, tasks.o(i.vTaskSuspendAll))
    1830. 

  1830. <BR><BR>[Called By]<UL><LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
    1831. 

  1831. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    1832. 

  1832. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    1833. 

  1833. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
    1834. 

  1834. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
    1835. 

  1835. <LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessTimerOrBlockTask
    1836. 

  1836. </UL>
    1837. 

  1837. 

  1838. <P><STRONG><a name="[6d]"></a>vTaskSwitchContext</STRONG> (Thumb, 122 bytes, Stack size 0 bytes, tasks.o(i.vTaskSwitchContext))
    1839. 

  1839. <BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PendSV_Handler
    1840. 

  1840. </UL>
    1841. 

  1841. 

  1842. <P><STRONG><a name="[87]"></a>xPortGetFreeHeapSize</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, heap_4.o(i.xPortGetFreeHeapSize))
    1843. 

  1843. <BR><BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Callback01
    1844. 

  1844. </UL>
    1845. 

  1845. 

  1846. <P><STRONG><a name="[88]"></a>xPortGetMinimumEverFreeHeapSize</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, heap_4.o(i.xPortGetMinimumEverFreeHeapSize))
    1847. 

  1847. <BR><BR>[Called By]<UL><LI><a href="#[60]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Callback01
    1848. 

  1848. </UL>
    1849. 

  1849. 

  1850. <P><STRONG><a name="[14f]"></a>xPortStartScheduler</STRONG> (Thumb, 330 bytes, Stack size 16 bytes, port.o(i.xPortStartScheduler))
    1851. 

  1851. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xPortStartScheduler
    1852. 

  1852. </UL>
    1853. 

  1853. <BR>[Calls]<UL><LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortSetupTimerInterrupt
    1854. 

  1854. <LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__asm___6_port_c_39a90d8d__prvEnableVFP
    1855. 

  1855. <LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__asm___6_port_c_39a90d8d__prvStartFirstTask
    1856. 

  1856. </UL>
    1857. 

  1857. <BR>[Called By]<UL><LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
    1858. 

  1858. </UL>
    1859. 

  1859. 

  1860. <P><STRONG><a name="[107]"></a>xPortSysTickHandler</STRONG> (Thumb, 46 bytes, Stack size 8 bytes, port.o(i.xPortSysTickHandler))
    1861. 

  1861. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = xPortSysTickHandler &rArr; xTaskIncrementTick
    1862. 

  1862. </UL>
    1863. 

  1863. <BR>[Calls]<UL><LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
    1864. 

  1864. </UL>
    1865. 

  1865. <BR>[Called By]<UL><LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
    1866. 

  1866. </UL>
    1867. 

  1867. 

  1868. <P><STRONG><a name="[128]"></a>xQueueGenericCreateStatic</STRONG> (Thumb, 224 bytes, Stack size 32 bytes, queue.o(i.xQueueGenericCreateStatic))
    1869. 

  1869. <BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    1870. 

  1870. </UL>
    1871. 

  1871. <BR>[Calls]<UL><LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewQueue
    1872. 

  1872. </UL>
    1873. 

  1873. <BR>[Called By]<UL><LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckForValidListAndQueue
    1874. 

  1874. </UL>
    1875. 

  1875. 

  1876. <P><STRONG><a name="[130]"></a>xQueueGenericReset</STRONG> (Thumb, 146 bytes, Stack size 16 bytes, queue.o(i.xQueueGenericReset))
    1877. 

  1877. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = xQueueGenericReset &rArr; xTaskRemoveFromEventList
    1878. 

  1878. </UL>
    1879. 

  1879. <BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskRemoveFromEventList
    1880. 

  1880. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    1881. 

  1881. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    1882. 

  1882. <LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInitialise
    1883. 

  1883. </UL>
    1884. 

  1884. <BR>[Called By]<UL><LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewQueue
    1885. 

  1885. </UL>
    1886. 

  1886. 

  1887. <P><STRONG><a name="[154]"></a>xQueueGenericSend</STRONG> (Thumb, 420 bytes, Stack size 56 bytes, queue.o(i.xQueueGenericSend))
    1888. 

  1888. <BR><BR>[Stack]<UL><LI>Max Depth = 104<LI>Call Chain = xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    1889. 

  1889. </UL>
    1890. 

  1890. <BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskRemoveFromEventList
    1891. 

  1891. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCheckForTimeOut
    1892. 

  1892. <LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskPlaceOnEventList
    1893. 

  1893. <LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskInternalSetTimeOutState
    1894. 

  1894. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvUnlockQueue
    1895. 

  1895. <LI><a href="#[137]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIsQueueFull
    1896. 

  1896. <LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCopyDataToQueue
    1897. 

  1897. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1898. 

  1898. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskGetSchedulerState
    1899. 

  1899. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
    1900. 

  1900. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    1901. 

  1901. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    1902. 

  1902. </UL>
    1903. 

  1903. <BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerGenericCommand
    1904. 

  1904. </UL>
    1905. 

  1905. 

  1906. <P><STRONG><a name="[157]"></a>xQueueGenericSendFromISR</STRONG> (Thumb, 252 bytes, Stack size 40 bytes, queue.o(i.xQueueGenericSendFromISR))
    1907. 

  1907. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = xQueueGenericSendFromISR &rArr; prvCopyDataToQueue &rArr; xTaskPriorityDisinherit
    1908. 

  1908. </UL>
    1909. 

  1909. <BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskRemoveFromEventList
    1910. 

  1910. <LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortValidateInterruptPriority
    1911. 

  1911. <LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCopyDataToQueue
    1912. 

  1912. </UL>
    1913. 

  1913. <BR>[Called By]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerGenericCommand
    1914. 

  1914. </UL>
    1915. 

  1915. 

  1916. <P><STRONG><a name="[13b]"></a>xQueueReceive</STRONG> (Thumb, 356 bytes, Stack size 48 bytes, queue.o(i.xQueueReceive))
    1917. 

  1917. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = xQueueReceive &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    1918. 

  1918. </UL>
    1919. 

  1919. <BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskRemoveFromEventList
    1920. 

  1920. <LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCheckForTimeOut
    1921. 

  1921. <LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskPlaceOnEventList
    1922. 

  1922. <LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskInternalSetTimeOutState
    1923. 

  1923. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvUnlockQueue
    1924. 

  1924. <LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIsQueueEmpty
    1925. 

  1925. <LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCopyDataFromQueue
    1926. 

  1926. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1927. 

  1927. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskGetSchedulerState
    1928. 

  1928. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
    1929. 

  1929. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    1930. 

  1930. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    1931. 

  1931. </UL>
    1932. 

  1932. <BR>[Called By]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessReceivedCommands
    1933. 

  1933. </UL>
    1934. 

  1934. 

  1935. <P><STRONG><a name="[156]"></a>xTaskCheckForTimeOut</STRONG> (Thumb, 132 bytes, Stack size 16 bytes, tasks.o(i.xTaskCheckForTimeOut))
    1936. 

  1936. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xTaskCheckForTimeOut
    1937. 

  1937. </UL>
    1938. 

  1938. <BR>[Calls]<UL><LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskInternalSetTimeOutState
    1939. 

  1939. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    1940. 

  1940. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    1941. 

  1941. </UL>
    1942. 

  1942. <BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    1943. 

  1943. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    1944. 

  1944. </UL>
    1945. 

  1945. 

  1946. <P><STRONG><a name="[118]"></a>xTaskCreate</STRONG> (Thumb, 100 bytes, Stack size 72 bytes, tasks.o(i.xTaskCreate))
    1947. 

  1947. <BR><BR>[Stack]<UL><LI>Max Depth = 136<LI>Call Chain = xTaskCreate &rArr; pvPortMalloc &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    1948. 

  1948. </UL>
    1949. 

  1949. <BR>[Calls]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
    1950. 

  1950. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
    1951. 

  1951. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
    1952. 

  1952. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
    1953. 

  1953. </UL>
    1954. 

  1954. <BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osThreadNew
    1955. 

  1955. </UL>
    1956. 

  1956. 

  1957. <P><STRONG><a name="[117]"></a>xTaskCreateStatic</STRONG> (Thumb, 186 bytes, Stack size 56 bytes, tasks.o(i.xTaskCreateStatic))
    1958. 

  1958. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = xTaskCreateStatic &rArr; prvInitialiseNewTask
    1959. 

  1959. </UL>
    1960. 

  1960. <BR>[Calls]<UL><LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTask
    1961. 

  1961. <LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
    1962. 

  1962. </UL>
    1963. 

  1963. <BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osThreadNew
    1964. 

  1964. <LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
    1965. 

  1965. <LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreateTimerTask
    1966. 

  1966. </UL>
    1967. 

  1967. 

  1968. <P><STRONG><a name="[106]"></a>xTaskGetSchedulerState</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, tasks.o(i.xTaskGetSchedulerState))
    1969. 

  1969. <BR><BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    1970. 

  1970. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    1971. 

  1971. <LI><a href="#[a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
    1972. 

  1972. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerGenericCommand
    1973. 

  1973. </UL>
    1974. 

  1974. 

  1975. <P><STRONG><a name="[f0]"></a>xTaskGetTickCount</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, tasks.o(i.xTaskGetTickCount))
    1976. 

  1976. <BR><BR>[Called By]<UL><LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;PWM_Send_Tim
    1977. 

  1977. <LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSampleTimeNow
    1978. 

  1978. </UL>
    1979. 

  1979. 

  1980. <P><STRONG><a name="[153]"></a>xTaskIncrementTick</STRONG> (Thumb, 280 bytes, Stack size 24 bytes, tasks.o(i.xTaskIncrementTick))
    1981. 

  1981. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = xTaskIncrementTick
    1982. 

  1982. </UL>
    1983. 

  1983. <BR>[Calls]<UL><LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvResetNextTaskUnblockTime
    1984. 

  1984. <LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
    1985. 

  1985. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    1986. 

  1986. </UL>
    1987. 

  1987. <BR>[Called By]<UL><LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    1988. 

  1988. <LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xPortSysTickHandler
    1989. 

  1989. </UL>
    1990. 

  1990. 

  1991. <P><STRONG><a name="[12e]"></a>xTaskPriorityDisinherit</STRONG> (Thumb, 152 bytes, Stack size 16 bytes, tasks.o(i.xTaskPriorityDisinherit))
    1992. 

  1992. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xTaskPriorityDisinherit
    1993. 

  1993. </UL>
    1994. 

  1994. <BR>[Calls]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
    1995. 

  1995. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    1996. 

  1996. </UL>
    1997. 

  1997. <BR>[Called By]<UL><LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCopyDataToQueue
    1998. 

  1998. </UL>
    1999. 

  1999. 

  2000. <P><STRONG><a name="[143]"></a>xTaskRemoveFromEventList</STRONG> (Thumb, 126 bytes, Stack size 16 bytes, tasks.o(i.xTaskRemoveFromEventList))
    2001. 

  2001. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = xTaskRemoveFromEventList
    2002. 

  2002. </UL>
    2003. 

  2003. <BR>[Calls]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
    2004. 

  2004. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    2005. 

  2005. </UL>
    2006. 

  2006. <BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    2007. 

  2007. <LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSendFromISR
    2008. 

  2008. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    2009. 

  2009. <LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericReset
    2010. 

  2010. <LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvUnlockQueue
    2011. 

  2011. </UL>
    2012. 

  2012. 

  2013. <P><STRONG><a name="[13e]"></a>xTaskResumeAll</STRONG> (Thumb, 222 bytes, Stack size 16 bytes, tasks.o(i.xTaskResumeAll))
    2014. 

  2014. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = xTaskResumeAll &rArr; xTaskIncrementTick
    2015. 

  2015. </UL>
    2016. 

  2016. <BR>[Calls]<UL><LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
    2017. 

  2017. <LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvResetNextTaskUnblockTime
    2018. 

  2018. <LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
    2019. 

  2019. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    2020. 

  2020. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    2021. 

  2021. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    2022. 

  2022. </UL>
    2023. 

  2023. <BR>[Called By]<UL><LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
    2024. 

  2024. <LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    2025. 

  2025. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    2026. 

  2026. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
    2027. 

  2027. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
    2028. 

  2028. <LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessTimerOrBlockTask
    2029. 

  2029. </UL>
    2030. 

  2030. 

  2031. <P><STRONG><a name="[11b]"></a>xTimerCreate</STRONG> (Thumb, 54 bytes, Stack size 40 bytes, timers.o(i.xTimerCreate))
    2032. 

  2032. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = xTimerCreate &rArr; prvInitialiseNewTimer &rArr; prvCheckForValidListAndQueue &rArr; xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    2033. 

  2033. </UL>
    2034. 

  2034. <BR>[Calls]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
    2035. 

  2035. <LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTimer
    2036. 

  2036. </UL>
    2037. 

  2037. <BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerNew
    2038. 

  2038. </UL>
    2039. 

  2039. 

  2040. <P><STRONG><a name="[11a]"></a>xTimerCreateStatic</STRONG> (Thumb, 114 bytes, Stack size 40 bytes, timers.o(i.xTimerCreateStatic))
    2041. 

  2041. <BR><BR>[Stack]<UL><LI>Max Depth = 168<LI>Call Chain = xTimerCreateStatic &rArr; prvInitialiseNewTimer &rArr; prvCheckForValidListAndQueue &rArr; xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    2042. 

  2042. </UL>
    2043. 

  2043. <BR>[Calls]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTimer
    2044. 

  2044. </UL>
    2045. 

  2045. <BR>[Called By]<UL><LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerNew
    2046. 

  2046. </UL>
    2047. 

  2047. 

  2048. <P><STRONG><a name="[14e]"></a>xTimerCreateTimerTask</STRONG> (Thumb, 100 bytes, Stack size 32 bytes, timers.o(i.xTimerCreateTimerTask))
    2049. 

  2049. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = xTimerCreateTimerTask &rArr; xTaskCreateStatic &rArr; prvInitialiseNewTask
    2050. 

  2050. </UL>
    2051. 

  2051. <BR>[Calls]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreateStatic
    2052. 

  2052. <LI><a href="#[159]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vApplicationGetTimerTaskMemory
    2053. 

  2053. <LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckForValidListAndQueue
    2054. 

  2054. </UL>
    2055. 

  2055. <BR>[Called By]<UL><LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskStartScheduler
    2056. 

  2056. </UL>
    2057. 

  2057. 

  2058. <P><STRONG><a name="[11d]"></a>xTimerGenericCommand</STRONG> (Thumb, 128 bytes, Stack size 48 bytes, timers.o(i.xTimerGenericCommand))
    2059. 

  2059. <BR><BR>[Stack]<UL><LI>Max Depth = 152<LI>Call Chain = xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2060. 

  2060. </UL>
    2061. 

  2061. <BR>[Calls]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSendFromISR
    2062. 

  2062. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    2063. 

  2063. <LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskGetSchedulerState
    2064. 

  2064. </UL>
    2065. 

  2065. <BR>[Called By]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerStart
    2066. 

  2066. <LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSwitchTimerLists
    2067. 

  2067. <LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessReceivedCommands
    2068. 

  2068. <LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessExpiredTimer
    2069. 

  2069. </UL>
    2070. 

  2070. <P>
    2071. 

  2071. <H3>
    2072. 

  2072. Local Symbols
    2073. 

  2073. </H3>
    2074. 

  2074. <P><STRONG><a name="[101]"></a>Remote_re_con</STRONG> (Thumb, 522 bytes, Stack size 0 bytes, bsp.o(i.Remote_re_con))
    2075. 

  2075. <BR><BR>[Called By]<UL><LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Sbus_Can_Handle
    2076. 

  2076. <LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sbus_loopdead
    2077. 

  2077. </UL>
    2078. 

  2078. 

  2079. <P><STRONG><a name="[147]"></a>update_sbus</STRONG> (Thumb, 302 bytes, Stack size 0 bytes, bsp.o(i.update_sbus))
    2080. 

  2080. <BR><BR>[Called By]<UL><LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sbus_loopdead
    2081. 

  2081. </UL>
    2082. 

  2082. 

  2083. <P><STRONG><a name="[a6]"></a>DMA_CalcBaseAndBitshift</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, stm32f4xx_hal_dma.o(i.DMA_CalcBaseAndBitshift))
    2084. 

  2084. <BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
    2085. 

  2085. </UL>
    2086. 

  2086. 

  2087. <P><STRONG><a name="[a5]"></a>DMA_CheckFifoParam</STRONG> (Thumb, 170 bytes, Stack size 0 bytes, stm32f4xx_hal_dma.o(i.DMA_CheckFifoParam))
    2088. 

  2088. <BR><BR>[Called By]<UL><LI><a href="#[a4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
    2089. 

  2089. </UL>
    2090. 

  2090. 

  2091. <P><STRONG><a name="[a8]"></a>DMA_SetConfig</STRONG> (Thumb, 44 bytes, Stack size 12 bytes, stm32f4xx_hal_dma.o(i.DMA_SetConfig))
    2092. 

  2092. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_SetConfig
    2093. 

  2093. </UL>
    2094. 

  2094. <BR>[Called By]<UL><LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
    2095. 

  2095. </UL>
    2096. 

  2096. 

  2097. <P><STRONG><a name="[b1]"></a>__NVIC_GetPriorityGrouping</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32f4xx_hal_cortex.o(i.__NVIC_GetPriorityGrouping))
    2098. 

  2098. <BR><BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    2099. 

  2099. </UL>
    2100. 

  2100. 

  2101. <P><STRONG><a name="[b2]"></a>__NVIC_SetPriority</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32f4xx_hal_cortex.o(i.__NVIC_SetPriority))
    2102. 

  2102. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = __NVIC_SetPriority
    2103. 

  2103. </UL>
    2104. 

  2104. <BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
    2105. 

  2105. </UL>
    2106. 

  2106. 

  2107. <P><STRONG><a name="[bd]"></a>TIM_ITRx_SetConfig</STRONG> (Thumb, 18 bytes, Stack size 0 bytes, stm32f4xx_hal_tim.o(i.TIM_ITRx_SetConfig))
    2108. 

  2108. <BR><BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2109. 

  2109. </UL>
    2110. 

  2110. 

  2111. <P><STRONG><a name="[c9]"></a>TIM_OC1_SetConfig</STRONG> (Thumb, 104 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_OC1_SetConfig))
    2112. 

  2112. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC1_SetConfig
    2113. 

  2113. </UL>
    2114. 

  2114. <BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2115. 

  2115. </UL>
    2116. 

  2116. 

  2117. <P><STRONG><a name="[cb]"></a>TIM_OC3_SetConfig</STRONG> (Thumb, 112 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_OC3_SetConfig))
    2118. 

  2118. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC3_SetConfig
    2119. 

  2119. </UL>
    2120. 

  2120. <BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2121. 

  2121. </UL>
    2122. 

  2122. 

  2123. <P><STRONG><a name="[cc]"></a>TIM_OC4_SetConfig</STRONG> (Thumb, 74 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_OC4_SetConfig))
    2124. 

  2124. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_OC4_SetConfig
    2125. 

  2125. </UL>
    2126. 

  2126. <BR>[Called By]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_PWM_ConfigChannel
    2127. 

  2127. </UL>
    2128. 

  2128. 

  2129. <P><STRONG><a name="[bc]"></a>TIM_TI1_ConfigInputStage</STRONG> (Thumb, 38 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_TI1_ConfigInputStage))
    2130. 

  2130. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_TI1_ConfigInputStage
    2131. 

  2131. </UL>
    2132. 

  2132. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2133. 

  2133. </UL>
    2134. 

  2134. 

  2135. <P><STRONG><a name="[be]"></a>TIM_TI2_ConfigInputStage</STRONG> (Thumb, 40 bytes, Stack size 12 bytes, stm32f4xx_hal_tim.o(i.TIM_TI2_ConfigInputStage))
    2136. 

  2136. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = TIM_TI2_ConfigInputStage
    2137. 

  2137. </UL>
    2138. 

  2138. <BR>[Called By]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_TIM_ConfigClockSource
    2139. 

  2139. </UL>
    2140. 

  2140. 

  2141. <P><STRONG><a name="[5f]"></a>UART_DMAAbortOnError</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, stm32f4xx_hal_uart.o(i.UART_DMAAbortOnError))
    2142. 

  2142. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UART_DMAAbortOnError
    2143. 

  2143. </UL>
    2144. 

  2144. <BR>[Calls]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
    2145. 

  2145. </UL>
    2146. 

  2146. <BR>[Address Reference Count : 1]<UL><LI> stm32f4xx_hal_uart.o(i.HAL_UART_IRQHandler)
    2147. 

  2147. </UL>
    2148. 

  2148. <P><STRONG><a name="[66]"></a>UART_DMAError</STRONG> (Thumb, 80 bytes, Stack size 16 bytes, stm32f4xx_hal_uart.o(i.UART_DMAError))
    2149. 

  2149. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UART_DMAError
    2150. 

  2150. </UL>
    2151. 

  2151. <BR>[Calls]<UL><LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
    2152. 

  2152. <LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTxTransfer
    2153. 

  2153. <LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
    2154. 

  2154. </UL>
    2155. 

  2155. <BR>[Address Reference Count : 1]<UL><LI> stm32f4xx_hal_uart.o(i.UART_Start_Receive_DMA)
    2156. 

  2156. </UL>
    2157. 

  2157. <P><STRONG><a name="[64]"></a>UART_DMAReceiveCplt</STRONG> (Thumb, 176 bytes, Stack size 16 bytes, stm32f4xx_hal_uart.o(i.UART_DMAReceiveCplt))
    2158. 

  2158. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UART_DMAReceiveCplt
    2159. 

  2159. </UL>
    2160. 

  2160. <BR>[Calls]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxCpltCallback
    2161. 

  2161. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
    2162. 

  2162. </UL>
    2163. 

  2163. <BR>[Address Reference Count : 1]<UL><LI> stm32f4xx_hal_uart.o(i.UART_Start_Receive_DMA)
    2164. 

  2164. </UL>
    2165. 

  2165. <P><STRONG><a name="[65]"></a>UART_DMARxHalfCplt</STRONG> (Thumb, 32 bytes, Stack size 16 bytes, stm32f4xx_hal_uart.o(i.UART_DMARxHalfCplt))
    2166. 

  2166. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = UART_DMARxHalfCplt
    2167. 

  2167. </UL>
    2168. 

  2168. <BR>[Calls]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxHalfCpltCallback
    2169. 

  2169. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
    2170. 

  2170. </UL>
    2171. 

  2171. <BR>[Address Reference Count : 1]<UL><LI> stm32f4xx_hal_uart.o(i.UART_Start_Receive_DMA)
    2172. 

  2172. </UL>
    2173. 

  2173. <P><STRONG><a name="[d5]"></a>UART_EndRxTransfer</STRONG> (Thumb, 108 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.UART_EndRxTransfer))
    2174. 

  2174. <BR><BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    2175. 

  2175. <LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
    2176. 

  2176. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
    2177. 

  2177. </UL>
    2178. 

  2178. 

  2179. <P><STRONG><a name="[dc]"></a>UART_EndTransmit_IT</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32f4xx_hal_uart.o(i.UART_EndTransmit_IT))
    2180. 

  2180. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART_EndTransmit_IT
    2181. 

  2181. </UL>
    2182. 

  2182. <BR>[Calls]<UL><LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_TxCpltCallback
    2183. 

  2183. </UL>
    2184. 

  2184. <BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    2185. 

  2185. </UL>
    2186. 

  2186. 

  2187. <P><STRONG><a name="[d4]"></a>UART_EndTxTransfer</STRONG> (Thumb, 38 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.UART_EndTxTransfer))
    2188. 

  2188. <BR><BR>[Called By]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
    2189. 

  2189. <LI><a href="#[66]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
    2190. 

  2190. </UL>
    2191. 

  2191. 

  2192. <P><STRONG><a name="[d7]"></a>UART_Receive_IT</STRONG> (Thumb, 248 bytes, Stack size 24 bytes, stm32f4xx_hal_uart.o(i.UART_Receive_IT))
    2193. 

  2193. <BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = UART_Receive_IT
    2194. 

  2194. </UL>
    2195. 

  2195. <BR>[Calls]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxCpltCallback
    2196. 

  2196. <LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
    2197. 

  2197. </UL>
    2198. 

  2198. <BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    2199. 

  2199. </UL>
    2200. 

  2200. 

  2201. <P><STRONG><a name="[df]"></a>UART_SetConfig</STRONG> (Thumb, 546 bytes, Stack size 40 bytes, stm32f4xx_hal_uart.o(i.UART_SetConfig))
    2202. 

  2202. <BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = UART_SetConfig &rArr; __aeabi_uldivmod
    2203. 

  2203. </UL>
    2204. 

  2204. <BR>[Calls]<UL><LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
    2205. 

  2205. <LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
    2206. 

  2206. <LI><a href="#[6e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
    2207. 

  2207. </UL>
    2208. 

  2208. <BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
    2209. 

  2209. </UL>
    2210. 

  2210. 

  2211. <P><STRONG><a name="[db]"></a>UART_Transmit_IT</STRONG> (Thumb, 96 bytes, Stack size 0 bytes, stm32f4xx_hal_uart.o(i.UART_Transmit_IT))
    2212. 

  2212. <BR><BR>[Called By]<UL><LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
    2213. 

  2213. </UL>
    2214. 

  2214. 

  2215. <P><STRONG><a name="[12c]"></a>prvCopyDataFromQueue</STRONG> (Thumb, 42 bytes, Stack size 16 bytes, queue.o(i.prvCopyDataFromQueue))
    2216. 

  2216. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = prvCopyDataFromQueue
    2217. 

  2217. </UL>
    2218. 

  2218. <BR>[Calls]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    2219. 

  2219. </UL>
    2220. 

  2220. <BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    2221. 

  2221. </UL>
    2222. 

  2222. 

  2223. <P><STRONG><a name="[12d]"></a>prvCopyDataToQueue</STRONG> (Thumb, 126 bytes, Stack size 24 bytes, queue.o(i.prvCopyDataToQueue))
    2224. 

  2224. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = prvCopyDataToQueue &rArr; xTaskPriorityDisinherit
    2225. 

  2225. </UL>
    2226. 

  2226. <BR>[Calls]<UL><LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskPriorityDisinherit
    2227. 

  2227. <LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    2228. 

  2228. </UL>
    2229. 

  2229. <BR>[Called By]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSendFromISR
    2230. 

  2230. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    2231. 

  2231. </UL>
    2232. 

  2232. 

  2233. <P><STRONG><a name="[12f]"></a>prvInitialiseNewQueue</STRONG> (Thumb, 42 bytes, Stack size 24 bytes, queue.o(i.prvInitialiseNewQueue))
    2234. 

  2234. <BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    2235. 

  2235. </UL>
    2236. 

  2236. <BR>[Calls]<UL><LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericReset
    2237. 

  2237. </UL>
    2238. 

  2238. <BR>[Called By]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericCreateStatic
    2239. 

  2239. </UL>
    2240. 

  2240. 

  2241. <P><STRONG><a name="[136]"></a>prvIsQueueEmpty</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, queue.o(i.prvIsQueueEmpty))
    2242. 

  2242. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = prvIsQueueEmpty
    2243. 

  2243. </UL>
    2244. 

  2244. <BR>[Calls]<UL><LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    2245. 

  2245. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    2246. 

  2246. </UL>
    2247. 

  2247. <BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    2248. 

  2248. </UL>
    2249. 

  2249. 

  2250. <P><STRONG><a name="[137]"></a>prvIsQueueFull</STRONG> (Thumb, 30 bytes, Stack size 16 bytes, queue.o(i.prvIsQueueFull))
    2251. 

  2251. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = prvIsQueueFull
    2252. 

  2252. </UL>
    2253. 

  2253. <BR>[Calls]<UL><LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    2254. 

  2254. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    2255. 

  2255. </UL>
    2256. 

  2256. <BR>[Called By]<UL><LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    2257. 

  2257. </UL>
    2258. 

  2258. 

  2259. <P><STRONG><a name="[142]"></a>prvUnlockQueue</STRONG> (Thumb, 126 bytes, Stack size 16 bytes, queue.o(i.prvUnlockQueue))
    2260. 

  2260. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = prvUnlockQueue &rArr; xTaskRemoveFromEventList
    2261. 

  2261. </UL>
    2262. 

  2262. <BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskRemoveFromEventList
    2263. 

  2263. <LI><a href="#[144]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskMissedYield
    2264. 

  2264. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    2265. 

  2265. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    2266. 

  2266. </UL>
    2267. 

  2267. <BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    2268. 

  2268. <LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericSend
    2269. 

  2269. <LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vQueueWaitForMessageRestricted
    2270. 

  2270. </UL>
    2271. 

  2271. 

  2272. <P><STRONG><a name="[11e]"></a>prvAddCurrentTaskToDelayedList</STRONG> (Thumb, 100 bytes, Stack size 24 bytes, tasks.o(i.prvAddCurrentTaskToDelayedList))
    2273. 

  2273. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2274. 

  2274. </UL>
    2275. 

  2275. <BR>[Calls]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
    2276. 

  2276. <LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsert
    2277. 

  2277. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    2278. 

  2278. </UL>
    2279. 

  2279. <BR>[Called By]<UL><LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskDelay
    2280. 

  2280. <LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskPlaceOnEventListRestricted
    2281. 

  2281. <LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskPlaceOnEventList
    2282. 

  2282. </UL>
    2283. 

  2283. 

  2284. <P><STRONG><a name="[122]"></a>prvAddNewTaskToReadyList</STRONG> (Thumb, 154 bytes, Stack size 8 bytes, tasks.o(i.prvAddNewTaskToReadyList))
    2285. 

  2285. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = prvAddNewTaskToReadyList &rArr; prvInitialiseTaskLists
    2286. 

  2286. </UL>
    2287. 

  2287. <BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseTaskLists
    2288. 

  2288. <LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsertEnd
    2289. 

  2289. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    2290. 

  2290. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    2291. 

  2291. </UL>
    2292. 

  2292. <BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreateStatic
    2293. 

  2293. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
    2294. 

  2294. </UL>
    2295. 

  2295. 

  2296. <P><STRONG><a name="[12a]"></a>prvCheckTasksWaitingTermination</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, tasks.o(i.prvCheckTasksWaitingTermination))
    2297. 

  2297. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = prvCheckTasksWaitingTermination &rArr; prvDeleteTCB &rArr; vPortFree &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    2298. 

  2298. </UL>
    2299. 

  2299. <BR>[Calls]<UL><LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvDeleteTCB
    2300. 

  2300. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    2301. 

  2301. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    2302. 

  2302. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    2303. 

  2303. </UL>
    2304. 

  2304. <BR>[Called By]<UL><LI><a href="#[69]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvIdleTask
    2305. 

  2305. </UL>
    2306. 

  2306. 

  2307. <P><STRONG><a name="[12b]"></a>prvDeleteTCB</STRONG> (Thumb, 80 bytes, Stack size 8 bytes, tasks.o(i.prvDeleteTCB))
    2308. 

  2308. <BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = prvDeleteTCB &rArr; vPortFree &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    2309. 

  2309. </UL>
    2310. 

  2310. <BR>[Calls]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
    2311. 

  2311. </UL>
    2312. 

  2312. <BR>[Called By]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckTasksWaitingTermination
    2313. 

  2313. </UL>
    2314. 

  2314. 

  2315. <P><STRONG><a name="[69]"></a>prvIdleTask</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, tasks.o(i.prvIdleTask))
    2316. 

  2316. <BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = prvIdleTask &rArr; prvCheckTasksWaitingTermination &rArr; prvDeleteTCB &rArr; vPortFree &rArr; xTaskResumeAll &rArr; xTaskIncrementTick
    2317. 

  2317. </UL>
    2318. 

  2318. <BR>[Calls]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckTasksWaitingTermination
    2319. 

  2319. </UL>
    2320. 

  2320. <BR>[Address Reference Count : 1]<UL><LI> tasks.o(i.vTaskStartScheduler)
    2321. 

  2321. </UL>
    2322. 

  2322. <P><STRONG><a name="[131]"></a>prvInitialiseNewTask</STRONG> (Thumb, 190 bytes, Stack size 40 bytes, tasks.o(i.prvInitialiseNewTask))
    2323. 

  2323. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = prvInitialiseNewTask
    2324. 

  2324. </UL>
    2325. 

  2325. <BR>[Calls]<UL><LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInitialiseItem
    2326. 

  2326. <LI><a href="#[72]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
    2327. 

  2327. <LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pxPortInitialiseStack
    2328. 

  2328. </UL>
    2329. 

  2329. <BR>[Called By]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreateStatic
    2330. 

  2330. <LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskCreate
    2331. 

  2331. </UL>
    2332. 

  2332. 

  2333. <P><STRONG><a name="[124]"></a>prvInitialiseTaskLists</STRONG> (Thumb, 70 bytes, Stack size 8 bytes, tasks.o(i.prvInitialiseTaskLists))
    2334. 

  2334. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = prvInitialiseTaskLists
    2335. 

  2335. </UL>
    2336. 

  2336. <BR>[Calls]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInitialise
    2337. 

  2337. </UL>
    2338. 

  2338. <BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvAddNewTaskToReadyList
    2339. 

  2339. </UL>
    2340. 

  2340. 

  2341. <P><STRONG><a name="[158]"></a>prvResetNextTaskUnblockTime</STRONG> (Thumb, 42 bytes, Stack size 0 bytes, tasks.o(i.prvResetNextTaskUnblockTime))
    2342. 

  2342. <BR><BR>[Called By]<UL><LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskIncrementTick
    2343. 

  2343. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    2344. 

  2344. </UL>
    2345. 

  2345. 

  2346. <P><STRONG><a name="[148]"></a>prvTaskCheckFreeStackSpace</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, tasks.o(i.prvTaskCheckFreeStackSpace))
    2347. 

  2347. <BR><BR>[Called By]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxTaskGetStackHighWaterMark
    2348. 

  2348. </UL>
    2349. 

  2349. 

  2350. <P><STRONG><a name="[126]"></a>prvCheckForValidListAndQueue</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, timers.o(i.prvCheckForValidListAndQueue))
    2351. 

  2351. <BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = prvCheckForValidListAndQueue &rArr; xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    2352. 

  2352. </UL>
    2353. 

  2353. <BR>[Calls]<UL><LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueGenericCreateStatic
    2354. 

  2354. <LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vQueueAddToRegistry
    2355. 

  2355. <LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortExitCritical
    2356. 

  2356. <LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortEnterCritical
    2357. 

  2357. <LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInitialise
    2358. 

  2358. </UL>
    2359. 

  2359. <BR>[Called By]<UL><LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInitialiseNewTimer
    2360. 

  2360. <LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreateTimerTask
    2361. 

  2361. </UL>
    2362. 

  2362. 

  2363. <P><STRONG><a name="[141]"></a>prvGetNextExpireTime</STRONG> (Thumb, 36 bytes, Stack size 0 bytes, timers.o(i.prvGetNextExpireTime))
    2364. 

  2364. <BR><BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvTimerTask
    2365. 

  2365. </UL>
    2366. 

  2366. 

  2367. <P><STRONG><a name="[134]"></a>prvInitialiseNewTimer</STRONG> (Thumb, 90 bytes, Stack size 32 bytes, timers.o(i.prvInitialiseNewTimer))
    2368. 

  2368. <BR><BR>[Stack]<UL><LI>Max Depth = 128<LI>Call Chain = prvInitialiseNewTimer &rArr; prvCheckForValidListAndQueue &rArr; xQueueGenericCreateStatic &rArr; prvInitialiseNewQueue &rArr; xQueueGenericReset &rArr; xTaskRemoveFromEventList
    2369. 

  2369. </UL>
    2370. 

  2370. <BR>[Calls]<UL><LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInitialiseItem
    2371. 

  2371. <LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvCheckForValidListAndQueue
    2372. 

  2372. </UL>
    2373. 

  2373. <BR>[Called By]<UL><LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreateStatic
    2374. 

  2374. <LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerCreate
    2375. 

  2375. </UL>
    2376. 

  2376. 

  2377. <P><STRONG><a name="[135]"></a>prvInsertTimerInActiveList</STRONG> (Thumb, 80 bytes, Stack size 24 bytes, timers.o(i.prvInsertTimerInActiveList))
    2378. 

  2378. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = prvInsertTimerInActiveList &rArr; vListInsert
    2379. 

  2379. </UL>
    2380. 

  2380. <BR>[Calls]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsert
    2381. 

  2381. </UL>
    2382. 

  2382. <BR>[Called By]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessReceivedCommands
    2383. 

  2383. <LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessExpiredTimer
    2384. 

  2384. </UL>
    2385. 

  2385. 

  2386. <P><STRONG><a name="[138]"></a>prvProcessExpiredTimer</STRONG> (Thumb, 110 bytes, Stack size 24 bytes, timers.o(i.prvProcessExpiredTimer))
    2387. 

  2387. <BR><BR>[Stack]<UL><LI>Max Depth = 176<LI>Call Chain = prvProcessExpiredTimer &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2388. 

  2388. </UL>
    2389. 

  2389. <BR>[Calls]<UL><LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    2390. 

  2390. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerGenericCommand
    2391. 

  2391. <LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInsertTimerInActiveList
    2392. 

  2392. </UL>
    2393. 

  2393. <BR>[Called By]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessTimerOrBlockTask
    2394. 

  2394. </UL>
    2395. 

  2395. 

  2396. <P><STRONG><a name="[139]"></a>prvProcessReceivedCommands</STRONG> (Thumb, 350 bytes, Stack size 48 bytes, timers.o(i.prvProcessReceivedCommands))
    2397. 

  2397. <BR><BR>[Stack]<UL><LI>Max Depth = 248<LI>Call Chain = prvProcessReceivedCommands &rArr; prvSampleTimeNow &rArr; prvSwitchTimerLists &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2398. 

  2398. </UL>
    2399. 

  2399. <BR>[Calls]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xQueueReceive
    2400. 

  2400. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    2401. 

  2401. <LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
    2402. 

  2402. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerGenericCommand
    2403. 

  2403. <LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSampleTimeNow
    2404. 

  2404. <LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvInsertTimerInActiveList
    2405. 

  2405. </UL>
    2406. 

  2406. <BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvTimerTask
    2407. 

  2407. </UL>
    2408. 

  2408. 

  2409. <P><STRONG><a name="[13c]"></a>prvProcessTimerOrBlockTask</STRONG> (Thumb, 102 bytes, Stack size 24 bytes, timers.o(i.prvProcessTimerOrBlockTask))
    2410. 

  2410. <BR><BR>[Stack]<UL><LI>Max Depth = 224<LI>Call Chain = prvProcessTimerOrBlockTask &rArr; prvSampleTimeNow &rArr; prvSwitchTimerLists &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2411. 

  2411. </UL>
    2412. 

  2412. <BR>[Calls]<UL><LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vQueueWaitForMessageRestricted
    2413. 

  2413. <LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskResumeAll
    2414. 

  2414. <LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vTaskSuspendAll
    2415. 

  2415. <LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSampleTimeNow
    2416. 

  2416. <LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessExpiredTimer
    2417. 

  2417. </UL>
    2418. 

  2418. <BR>[Called By]<UL><LI><a href="#[6a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvTimerTask
    2419. 

  2419. </UL>
    2420. 

  2420. 

  2421. <P><STRONG><a name="[13a]"></a>prvSampleTimeNow</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, timers.o(i.prvSampleTimeNow))
    2422. 

  2422. <BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = prvSampleTimeNow &rArr; prvSwitchTimerLists &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2423. 

  2423. </UL>
    2424. 

  2424. <BR>[Calls]<UL><LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTaskGetTickCount
    2425. 

  2425. <LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSwitchTimerLists
    2426. 

  2426. </UL>
    2427. 

  2427. <BR>[Called By]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessTimerOrBlockTask
    2428. 

  2428. <LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessReceivedCommands
    2429. 

  2429. </UL>
    2430. 

  2430. 

  2431. <P><STRONG><a name="[140]"></a>prvSwitchTimerLists</STRONG> (Thumb, 154 bytes, Stack size 32 bytes, timers.o(i.prvSwitchTimerLists))
    2432. 

  2432. <BR><BR>[Stack]<UL><LI>Max Depth = 184<LI>Call Chain = prvSwitchTimerLists &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2433. 

  2433. </UL>
    2434. 

  2434. <BR>[Calls]<UL><LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vListInsert
    2435. 

  2435. <LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;uxListRemove
    2436. 

  2436. <LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;xTimerGenericCommand
    2437. 

  2437. </UL>
    2438. 

  2438. <BR>[Called By]<UL><LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvSampleTimeNow
    2439. 

  2439. </UL>
    2440. 

  2440. 

  2441. <P><STRONG><a name="[6a]"></a>prvTimerTask</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, timers.o(i.prvTimerTask))
    2442. 

  2442. <BR><BR>[Stack]<UL><LI>Max Depth = 256<LI>Call Chain = prvTimerTask &rArr; prvProcessReceivedCommands &rArr; prvSampleTimeNow &rArr; prvSwitchTimerLists &rArr; xTimerGenericCommand &rArr; xQueueGenericSend &rArr; vTaskPlaceOnEventList &rArr; prvAddCurrentTaskToDelayedList &rArr; vListInsert
    2443. 

  2443. </UL>
    2444. 

  2444. <BR>[Calls]<UL><LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessTimerOrBlockTask
    2445. 

  2445. <LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvProcessReceivedCommands
    2446. 

  2446. <LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;prvGetNextExpireTime
    2447. 

  2447. </UL>
    2448. 

  2448. <BR>[Address Reference Count : 1]<UL><LI> timers.o(i.xTimerCreateTimerTask)
    2449. 

  2449. </UL>
    2450. 

  2450. <P><STRONG><a name="[67]"></a>TimerCallback</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, cmsis_os2.o(i.TimerCallback))
    2451. 

  2451. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = TimerCallback &rArr; pvTimerGetTimerID
    2452. 

  2452. </UL>
    2453. 

  2453. <BR>[Calls]<UL><LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvTimerGetTimerID
    2454. 

  2454. </UL>
    2455. 

  2455. <BR>[Address Reference Count : 1]<UL><LI> cmsis_os2.o(i.osTimerNew)
    2456. 

  2456. </UL>
    2457. 

  2457. <P><STRONG><a name="[114]"></a>__get_IPSR</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, cmsis_os2.o(i.__get_IPSR))
    2458. 

  2458. <BR><BR>[Called By]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerStart
    2459. 

  2459. <LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osTimerNew
    2460. 

  2460. <LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osThreadNew
    2461. 

  2461. <LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osDelay
    2462. 

  2462. <LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osKernelStart
    2463. 

  2463. <LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;osKernelInitialize
    2464. 

  2464. </UL>
    2465. 

  2465. 

  2466. <P><STRONG><a name="[145]"></a>prvHeapInit</STRONG> (Thumb, 98 bytes, Stack size 12 bytes, heap_4.o(i.prvHeapInit))
    2467. 

  2467. <BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = prvHeapInit
    2468. 

  2468. </UL>
    2469. 

  2469. <BR>[Called By]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
    2470. 

  2470. </UL>
    2471. 

  2471. 

  2472. <P><STRONG><a name="[146]"></a>prvInsertBlockIntoFreeList</STRONG> (Thumb, 96 bytes, Stack size 8 bytes, heap_4.o(i.prvInsertBlockIntoFreeList))
    2473. 

  2473. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = prvInsertBlockIntoFreeList
    2474. 

  2474. </UL>
    2475. 

  2475. <BR>[Called By]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;vPortFree
    2476. 

  2476. <LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pvPortMalloc
    2477. 

  2477. </UL>
    2478. 

  2478. 

  2479. <P><STRONG><a name="[68]"></a>prvTaskExitError</STRONG> (Thumb, 60 bytes, Stack size 0 bytes, port.o(i.prvTaskExitError))
    2480. 

  2480. <BR>[Address Reference Count : 1]<UL><LI> port.o(i.pxPortInitialiseStack)
    2481. 

  2481. </UL>
    2482. 

  2482. <P><STRONG><a name="[f4]"></a>_DoInit</STRONG> (Thumb, 82 bytes, Stack size 16 bytes, segger_rtt.o(i._DoInit))
    2483. 

  2483. <BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = _DoInit
    2484. 

  2484. </UL>
    2485. 

  2485. <BR>[Calls]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
    2486. 

  2486. </UL>
    2487. 

  2487. <BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_Init
    2488. 

  2488. <LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_Write
    2489. 

  2489. </UL>
    2490. 

  2490. 

  2491. <P><STRONG><a name="[f7]"></a>_GetAvailWriteSpace</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, segger_rtt.o(i._GetAvailWriteSpace))
    2492. 

  2492. <BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = _GetAvailWriteSpace
    2493. 

  2493. </UL>
    2494. 

  2494. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_WriteNoLock
    2495. 

  2495. </UL>
    2496. 

  2496. 

  2497. <P><STRONG><a name="[f9]"></a>_WriteBlocking</STRONG> (Thumb, 118 bytes, Stack size 40 bytes, segger_rtt.o(i._WriteBlocking))
    2498. 

  2498. <BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = _WriteBlocking
    2499. 

  2499. </UL>
    2500. 

  2500. <BR>[Calls]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    2501. 

  2501. </UL>
    2502. 

  2502. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_WriteNoLock
    2503. 

  2503. </UL>
    2504. 

  2504. 

  2505. <P><STRONG><a name="[f8]"></a>_WriteNoCheck</STRONG> (Thumb, 88 bytes, Stack size 32 bytes, segger_rtt.o(i._WriteNoCheck))
    2506. 

  2506. <BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = _WriteNoCheck
    2507. 

  2507. </UL>
    2508. 

  2508. <BR>[Calls]<UL><LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memcpy
    2509. 

  2509. </UL>
    2510. 

  2510. <BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_WriteNoLock
    2511. 

  2511. </UL>
    2512. 

  2512. 

  2513. <P><STRONG><a name="[ff]"></a>_PrintFloat</STRONG> (Thumb, 248 bytes, Stack size 64 bytes, segger_rtt_printf.o(i._PrintFloat))
    2514. 

  2514. <BR><BR>[Stack]<UL><LI>Max Depth = 272<LI>Call Chain = _PrintFloat &rArr; _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    2515. 

  2515. </UL>
    2516. 

  2516. <BR>[Calls]<UL><LI><a href="#[7b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_i2d
    2517. 

  2517. <LI><a href="#[7a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dmul
    2518. 

  2518. <LI><a href="#[7c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_d2iz
    2519. 

  2519. <LI><a href="#[79]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_drsub
    2520. 

  2520. <LI><a href="#[74]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_dadd
    2521. 

  2521. <LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_cdcmple
    2522. 

  2522. <LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_StoreChar
    2523. 

  2523. <LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintInt
    2524. 

  2524. </UL>
    2525. 

  2525. <BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_vprintf
    2526. 

  2526. </UL>
    2527. 

  2527. 

  2528. <P><STRONG><a name="[fd]"></a>_PrintInt</STRONG> (Thumb, 236 bytes, Stack size 48 bytes, segger_rtt_printf.o(i._PrintInt))
    2529. 

  2529. <BR><BR>[Stack]<UL><LI>Max Depth = 208<LI>Call Chain = _PrintInt &rArr; _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    2530. 

  2530. </UL>
    2531. 

  2531. <BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_StoreChar
    2532. 

  2532. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintUnsigned
    2533. 

  2533. </UL>
    2534. 

  2534. <BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_vprintf
    2535. 

  2535. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    2536. 

  2536. </UL>
    2537. 

  2537. 

  2538. <P><STRONG><a name="[fe]"></a>_PrintUnsigned</STRONG> (Thumb, 230 bytes, Stack size 48 bytes, segger_rtt_printf.o(i._PrintUnsigned))
    2539. 

  2539. <BR><BR>[Stack]<UL><LI>Max Depth = 160<LI>Call Chain = _PrintUnsigned &rArr; _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    2540. 

  2540. </UL>
    2541. 

  2541. <BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_StoreChar
    2542. 

  2542. </UL>
    2543. 

  2543. <BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_vprintf
    2544. 

  2544. <LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintInt
    2545. 

  2545. </UL>
    2546. 

  2546. 

  2547. <P><STRONG><a name="[fc]"></a>_StoreChar</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, segger_rtt_printf.o(i._StoreChar))
    2548. 

  2548. <BR><BR>[Stack]<UL><LI>Max Depth = 112<LI>Call Chain = _StoreChar &rArr; SEGGER_RTT_Write &rArr; SEGGER_RTT_WriteNoLock &rArr; _WriteBlocking
    2549. 

  2549. </UL>
    2550. 

  2550. <BR>[Calls]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_Write
    2551. 

  2551. </UL>
    2552. 

  2552. <BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SEGGER_RTT_vprintf
    2553. 

  2553. <LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintUnsigned
    2554. 

  2554. <LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintInt
    2555. 

  2555. <LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_PrintFloat
    2556. 

  2556. </UL>
    2557. 

  2557. <P>
    2558. 

  2558. <H3>
    2559. 

  2559. Undefined Global Symbols
    2560. 

  2560. </H3><HR></body></html>
    2561.