SEGGER_RTT_ASM_ARMv7M.S 11 KB

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  1. /*
  2. -------------------------- END-OF-HEADER -----------------------------
  3. File : SEGGER_RTT_ASM_ARMv7M.SPurpose : Assembler implementation of RTT functions for ARMv7M
  4. Additional information:
  5. This module is written to be assembler-independent and works with
  6. GCC and clang (Embedded Studio) and IAR.
  7. */
  8. #define SEGGER_RTT_ASM // Used to control processed input from header file
  9. #include "SEGGER_RTT.h"
  10. /*********************************************************************
  11. *
  12. * Defines, fixed
  13. *
  14. **********************************************************************
  15. */
  16. #define _CCIAR 0
  17. #define _CCCLANG 1
  18. #if (defined __SES_ARM) || (defined __GNUC__) || (defined __clang__)
  19. #define _CC_TYPE _CCCLANG
  20. #define _PUB_SYM .global
  21. #define _EXT_SYM .extern
  22. #define _END .end
  23. #define _WEAK .weak
  24. #define _THUMB_FUNC .thumb_func
  25. #define _THUMB_CODE .code 16
  26. #define _WORD .word
  27. #define _SECTION(Sect, Type, AlignExp) .section Sect ##, "ax"
  28. #define _ALIGN(Exp) .align Exp
  29. #define _PLACE_LITS .ltorg
  30. #define _DATA_SECT_START
  31. #define _C_STARTUP _start
  32. #define _STACK_END __stack_end__
  33. #define _RAMFUNC
  34. //
  35. // .text => Link to flash
  36. // .fast => Link to RAM
  37. // OtherSect => Usually link to RAM
  38. // Alignment is 2^x
  39. //
  40. #elif defined (__IASMARM__)
  41. #define _CC_TYPE _CCIAR
  42. #define _PUB_SYM PUBLIC
  43. #define _EXT_SYM EXTERN
  44. #define _END END
  45. #define _WEAK _WEAK
  46. #define _THUMB_FUNC
  47. #define _THUMB_CODE THUMB
  48. #define _WORD DCD
  49. #define _SECTION(Sect, Type, AlignExp) SECTION Sect ## : ## Type ## :REORDER:NOROOT ## (AlignExp)
  50. #define _ALIGN(Exp) alignrom Exp
  51. #define _PLACE_LITS
  52. #define _DATA_SECT_START DATA
  53. #define _C_STARTUP __iar_program_start
  54. #define _STACK_END sfe(CSTACK)
  55. #define _RAMFUNC SECTION_TYPE SHT_PROGBITS, SHF_WRITE | SHF_EXECINSTR
  56. //
  57. // .text => Link to flash
  58. // .textrw => Link to RAM
  59. // OtherSect => Usually link to RAM
  60. // NOROOT => Allows linker to throw away the function, if not referenced
  61. // Alignment is 2^x
  62. //
  63. #endif
  64. #if (_CC_TYPE == _CCIAR)
  65. NAME SEGGER_RTT_ASM_ARMv7M
  66. #else
  67. .syntax unified
  68. #endif
  69. #if defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
  70. #define SHT_PROGBITS 0x1
  71. /*********************************************************************
  72. *
  73. * Public / external symbols
  74. *
  75. **********************************************************************
  76. */
  77. _EXT_SYM __aeabi_memcpy
  78. _EXT_SYM __aeabi_memcpy4
  79. _EXT_SYM _SEGGER_RTT
  80. _PUB_SYM SEGGER_RTT_ASM_WriteSkipNoLock
  81. /*********************************************************************
  82. *
  83. * SEGGER_RTT_WriteSkipNoLock
  84. *
  85. * Function description
  86. * Stores a specified number of characters in SEGGER RTT
  87. * control block which is then read by the host.
  88. * SEGGER_RTT_WriteSkipNoLock does not lock the application and
  89. * skips all data, if the data does not fit into the buffer.
  90. *
  91. * Parameters
  92. * BufferIndex Index of "Up"-buffer to be used (e.g. 0 for "Terminal").
  93. * pBuffer Pointer to character array. Does not need to point to a \0 terminated string.
  94. * NumBytes Number of bytes to be stored in the SEGGER RTT control block.
  95. * MUST be > 0!!!
  96. * This is done for performance reasons, so no initial check has do be done.
  97. *
  98. * Return value
  99. * 1: Data has been copied
  100. * 0: No space, data has not been copied
  101. *
  102. * Notes
  103. * (1) If there is not enough space in the "Up"-buffer, all data is dropped.
  104. * (2) For performance reasons this function does not call Init()
  105. * and may only be called after RTT has been initialized.
  106. * Either by calling SEGGER_RTT_Init() or calling another RTT API function first.
  107. */
  108. _SECTION(.text, CODE, 2)
  109. _ALIGN(2)
  110. _THUMB_FUNC
  111. SEGGER_RTT_ASM_WriteSkipNoLock: // unsigned SEGGER_RTT_WriteSkipNoLock(unsigned BufferIndex, const void* pData, unsigned NumBytes) {
  112. //
  113. // Cases:
  114. // 1) RdOff <= WrOff => Space until wrap-around is sufficient
  115. // 2) RdOff <= WrOff => Space after wrap-around needed (copy in 2 chunks)
  116. // 3) RdOff < WrOff => No space in buf
  117. // 4) RdOff > WrOff => Space is sufficient
  118. // 5) RdOff > WrOff => No space in buf
  119. //
  120. // 1) is the most common case for large buffers and assuming that J-Link reads the data fast enough
  121. //
  122. // Register usage:
  123. // R0 Temporary needed as RdOff, <Tmp> register later on
  124. // R1 pData
  125. // R2 <NumBytes>
  126. // R3 <Tmp> register. Hold free for subroutine calls
  127. // R4 <Rem>
  128. // R5 pRing->pBuffer
  129. // R6 pRing (Points to active struct SEGGER_RTT_BUFFER_DOWN)
  130. // R7 WrOff
  131. //
  132. PUSH {R4-R7}
  133. ADD R3,R0,R0, LSL #+1
  134. LDR.W R0,=_SEGGER_RTT // pRing = &_SEGGER_RTT.aUp[BufferIndex];
  135. ADD R0,R0,R3, LSL #+3
  136. ADD R6,R0,#+24
  137. LDR R0,[R6, #+16] // RdOff = pRing->RdOff;
  138. LDR R7,[R6, #+12] // WrOff = pRing->WrOff;
  139. LDR R5,[R6, #+4] // pRing->pBuffer
  140. CMP R7,R0
  141. BCC.N _CheckCase4 // if (RdOff <= WrOff) { => Case 1), 2) or 3)
  142. //
  143. // Handling for case 1, later on identical to case 4
  144. //
  145. LDR R3,[R6, #+8] // Avail = pRing->SizeOfBuffer - WrOff - 1u; => Space until wrap-around (assume 1 byte not usable for case that RdOff == 0)
  146. SUBS R4,R3,R7 // <Rem> (Used in case we jump into case 2 afterwards)
  147. SUBS R3,R4,#+1 // <Avail>
  148. CMP R3,R2
  149. BCC.N _CheckCase2 // if (Avail >= NumBytes) { => Case 1)?
  150. _Case4:
  151. ADDS R5,R7,R5 // pBuffer += WrOff
  152. ADDS R0,R2,R7 // v = WrOff + NumBytes
  153. //
  154. // 2x unrolling for the copy loop that is used most of the time
  155. // This is a special optimization for small SystemView packets and makes them even faster
  156. //
  157. _ALIGN(2)
  158. _LoopCopyStraight: // memcpy(pRing->pBuffer + WrOff, pData, NumBytes);
  159. LDRB R3,[R1], #+1
  160. STRB R3,[R5], #+1 // *pDest++ = *pSrc++
  161. SUBS R2,R2,#+1
  162. BEQ _CSDone
  163. LDRB R3,[R1], #+1
  164. STRB R3,[R5], #+1 // *pDest++ = *pSrc++
  165. SUBS R2,R2,#+1
  166. BNE _LoopCopyStraight
  167. _CSDone:
  168. #if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
  169. DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
  170. #endif
  171. STR R0,[R6, #+12] // pRing->WrOff = WrOff + NumBytes;
  172. MOVS R0,#+1
  173. POP {R4-R7}
  174. BX LR // Return 1
  175. _CheckCase2:
  176. ADDS R0,R0,R3 // Avail += RdOff; => Space incl. wrap-around
  177. CMP R0,R2
  178. BCC.N _Case3 // if (Avail >= NumBytes) { => Case 2? => If not, we have case 3) (does not fit)
  179. //
  180. // Handling for case 2
  181. //
  182. ADDS R0,R7,R5 // v = pRing->pBuffer + WrOff => Do not change pRing->pBuffer here because 2nd chunk needs org. value
  183. SUBS R2,R2,R4 // NumBytes -= Rem; (Rem = pRing->SizeOfBuffer - WrOff; => Space until end of buffer)
  184. _LoopCopyBeforeWrapAround: // memcpy(pRing->pBuffer + WrOff, pData, Rem); => Copy 1st chunk
  185. LDRB R3,[R1], #+1
  186. STRB R3,[R0], #+1 // *pDest++ = *pSrc++
  187. SUBS R4,R4,#+1
  188. BNE _LoopCopyBeforeWrapAround
  189. //
  190. // Special case: First check that assumed RdOff == 0 calculated that last element before wrap-around could not be used
  191. // But 2nd check (considering space until wrap-around and until RdOff) revealed that RdOff is not 0, so we can use the last element
  192. // In this case, we may use a copy straight until buffer end anyway without needing to copy 2 chunks
  193. // Therefore, check if 2nd memcpy is necessary at all
  194. //
  195. ADDS R4,R2,#+0 // Save <NumBytes> (needed as counter in loop but must be written to <WrOff> after the loop). Also use this inst to update the flags to skip 2nd loop if possible
  196. BEQ.N _No2ChunkNeeded // if (NumBytes) {
  197. _LoopCopyAfterWrapAround: // memcpy(pRing->pBuffer, pData + Rem, NumBytes);
  198. LDRB R3,[R1], #+1 // pData already points to the next src byte due to copy loop increment before this loop
  199. STRB R3,[R5], #+1 // *pDest++ = *pSrc++
  200. SUBS R2,R2,#+1
  201. BNE _LoopCopyAfterWrapAround
  202. _No2ChunkNeeded:
  203. #if _CORE_NEEDS_DMB // Do not slow down cores that do not need a DMB instruction here
  204. DMB // Cortex-M7 may delay memory writes and also change the order in which the writes happen. Therefore, make sure that all buffer writes are finished, before updating the <WrOff> in the struct
  205. #endif
  206. STR R4,[R6, #+12] // pRing->WrOff = NumBytes; => Must be written after copying data because J-Link may read control block asynchronously while writing into buffer
  207. MOVS R0,#+1
  208. POP {R4-R7}
  209. BX LR // Return 1
  210. _CheckCase4:
  211. SUBS R0,R0,R7
  212. SUBS R0,R0,#+1 // Avail = RdOff - WrOff - 1u;
  213. CMP R0,R2
  214. BCS.N _Case4 // if (Avail >= NumBytes) { => Case 4) == 1) ? => If not, we have case 5) == 3) (does not fit)
  215. _Case3:
  216. MOVS R0,#+0
  217. POP {R4-R7}
  218. BX LR // Return 0
  219. _PLACE_LITS
  220. #endif // defined (RTT_USE_ASM) && (RTT_USE_ASM == 1)
  221. _END
  222. /*************************** End of file ****************************/